Friday, February 29, 2008

2008: AMD Still Trailing

Intel is still moving along about the same as it has been making slow, incremental progress from the time that C2D was launched in 2006. It is clear that the increase in speed from Penryn doesn't match the early Intel hype but nevertheless any increase in speed is just that much more that it is faster than AMD. Likewise the tiny speed increases from 3.0 Ghz to 3.16 Ghz (quad core) and 3.4Ghz (dual core) are no doubt frustrating for Intel fans who would like more speed. On the other hand, AMD currently has nothing even close..

AMD will probably deliver 2.6 Ghz common chips in Q2. This chart at Computerbase claims AMD will release an FX chip in Q3. I'm not so sure about this because everything would suggest an FX of only 2.8 Ghz. This is probably the lowest clock that AMD could possibly get by with on the FX brand. There is no doubt that AMD needs a quad FX because people who bought FX in 2006 were promised upgrades and none have been forthcoming. Such a 2.8 Ghz FX would probably be clockable to 3.0 - 3.1 Ghz (with premium air cooling) based on what I've seen of the B3 stepping. This is probably the best AMD can do for now as I haven't seen anything that would suggest that B3 can deliver 2.8 Ghz as a common volume. This means that the poor man's version of FX, Black Edition will probably bump up to 2.6 Ghz as well. Intel seems to be somewhat behind in terms of 45nm but this hardly matters since their G0 stepping of 65nm works so well. But there is no doubt that AMD will be facing more 45nm Penryns in Q2. The shortages of chips have shielded AMD somewhat from increased presssure from Intel during Q4 and Q1 (although with Barcelona delayed server share may take another hit in Q1). However, as Q2 is the lowest volume of the year AMD will have to be aggressive to avoid a volume share drop during that quarter.

Probably, Fuad is closer to the truth of FX saying Q3:

The Deneb FX and Deneb cores, both 45nm quad-cores, are the first on the list. If they execute well we should see Deneb quad-core with shared L3 cache and 95W TDB in Q3. If not, the new hope will slip into Q4.

The timeline for FX being Q3 or maybe Q4 is not surprising at all. What is surprising is the idea that AMD's first new FX chip would be 45nm. If this is true then this would support the notion that AMD has suspended development of 65nm. But it would be surprising if 45nm could ramp that quickly.

The question then is what will happen in Q3 as AMD faces a steadily increasing volume of Penryn chips. The rumors suggest that AMD will not try to release a 65nm 2.8 Ghz Phenom. I'm not sure if this would then indicate that the 65nm process would hit a ceiling or whether this is to suggest that AMD will pursue these speeds with 45nm Shanghai. Another question is what 9850 might be. 9750 is supposed to be 2.4 Ghz while 9950 has been suggested to be 2.6 Ghz. So, would 9850 be 2.5Ghz perhaps? The topping out of the naming scheme does lend some credibility to the idea that AMD will suspend 65nm development and try to move to Shanghai as quickly as possible. Nevertheless, there is a big, big question of whether AMD could really deliver a 2.8 Ghz 45nm Shanghai in, say, Q3. Ever since the release of 130nm SOI, AMD's initial clock speeds on the new process have always been lower so there is a lot of doubt that AMD could reach 2.8Ghz on 45nm any sooner than Q4 2008. Nehalem will almost certainly be too small of volume in Q4 to be much of a factor. So, it looks like AMD's goal is to somehow get clock speed up and this seems even less likely with a mid year switch in process unless with 45nm AMD exceeds all past SOI efforts.

Early 2009 looks pretty good for Intel since it will not only have Penryn and Dunnington but increasing volumes of Nehalem. It still remains to be seen if Intel really will give up its lucrative chipset business on the desktop with Nehalem. It certainly seems that it wouldn't take much effort to modify an AMD HT based chipset to work with Intel's CSI interface. That would seem to remove a lot of Intel's current proprietary FSB advantage. On the other hand, with ATI out of the way this would seem to be the best time for Intel to face more competition in chipsets. Still, this does leave things a bit up in the air. If it becomes easier and cheaper to design chipsets as it surely would be if CSI is similar to HT then VIA might become more competitive. For AMD's part there seems little they can do in 2009 except try to ramp the clock speeds on Shanghai.

We have three other issues to talk about: one immediate and two longterm. The immediate issue is Hester's interview at Hexus where he mentions the slow clock speeds of K10. Basically, Hester says that the 65nm process is fine; it is a matter of adjusting some critical paths. I've seen this statement heckled by some who insist that you can't separate process from design. Curiously, these are the same people who also insisted that Intel's 90nm process was fine and that it was only a poor design with Prescott that was the problem. Anyway, this statement by Hester actually seems quite accurate to me. It was my impression that AMD had intended K10 to run at lower voltage which would have allowed higher clocks. This again seems to fit what we've seen with K10's limited by TDP. The reason for the higher voltage seems to be that the transistors don't quite switch fast enough and this causes some of the "critical paths" that Hester talked about to get out of synch. You could fix this at a low level by improving the transistors to get them back into spec with the design. Or, you could relax the timing on these critical paths which would get the design on spec with the transistors. Because 45nm is right around the corner it appears that AMD has decided to not expend more resources on 65nm improvement and will instead relax the timing. AMD's work on 45nm transistors will theoretically migrate down to 65nm, at least this is the theory of AMD's CTI (Continuous Transistor Improvement) program. However, we may now be entering a new era where improvements are so specialized that they may be unable to cross process boundaries as they used to and we may see AMD following Intel's lead. This would mean tighter design at the beginning of each process node and less reliance on later improvements.

The two long term issues concern the possibility of a New York FAB for AMD and the announcement on EUV. There are three questions about a NY FAB: Does AMD need it? Can they afford it? And, why NY instead of Dresden where FAB 30 and 36 are now? Need is most obvious because without a new FAB AMD's capacity will top out by mid to late 2010 unless the FAB 38 ramp is slower than expected. Affording is a big question but one that AMD can leave aside for now hoping that their cash situation will improve. The question of location is a curious one. One suggestion was that NY simply offered more incentives than Dresden but this by itself seems unlikely. In every case in the past Germany has shown itself more than willing to contribute money for AMD's FABs. So, the real reason for the NY location may have more to do with other factors. In fact, we even seemed to have some evidence of this from the EUV announcement.

"The AMD test chip first went through processing at AMD’s Fab 36 in Dresden, Germany, using 193 nm immersion lithography, the most advanced lithography tools in high volume production today. The test chip wafers were then shipped to IBM’s Research Facility at the College of Nanoscale Science and Engineering (CNSE) in Albany, New York where AMD, IBM and their partners used an ASML EUV lithography scanner installed in Albany through a partnership with ASML, IBM and CNSE, to pattern the first layer of metal interconnects between the transistors built in Germany."

Secondly, we need to remember that AMD only fell behind on process technology when it moved to 130nm in 2002. Prior to this AMD was doing pretty well. Although things seemed to improve after AMD's rocky transition to 130nm SOI AMD now seems to be falling behind again at 45nm. AMD used to operate its Submicron Development Center (SDC) in Sunnyvale, California. This facility was leading edge back in 1999. It surely is not lost on AMD that they have now surpassed IBM. Back in 2002 AMD only had a 200mm FAB while IBM had a more modern 300mm FAB as well as more capacity. AMD today has caught up in terms of FAB technology but passed IBM in terms of capacity. The big question for AMD has to be how badly IBM needs leading edge process technology and for how long. Robust server and mainframe chips need reliability more than top speed. Secondly, IBM has been steadily divesting hardware so one has to wonder when the processor division might become a target. Notice that in the above announcement the wafers had to be flown from FAB 36 in Dresden to New York. Given these facts I think it is possible that AMD wants to create another research facility at New York. I think this could serve both to tweak processes faster and optimize them better for AMD's needs as well as pick up any slack if research at IBM falls off. There has been no indication of this but it does seem plausible.

The recent EUV announcement is incomplete however. If we look at an IBM article on EUV in EETimes from February 23, 2007 we see that IBM very much wanted EUV for 22nm but figured that it wouldn't be ready in time for early development work.

The industry hopes EUV will make it into production sooner than latter, but the technology must reach certain milestones. ''I think the next 9 to 12 months are very critical to achieve this,'' said George Gomba, IBM distinguished engineer and director of lithography technology development at the company.

Twelve months from February 2007 would be now. So, what is missing from the EUV announcement is whether or not this recent test puts EUV on track for IBM for 22nm or whether it will have to wait for 16nm. A second question is why the test wafer was made at Dresden by AMD. If IBM had already tested its own wafers then why didn't it announce earlier? This could mean that AMD has decided to try to hit the 22nm node for EUV but that IBM has decided to wait until 16nm. If this is a more aggressive stance for AMD then it could mean that AMD will rely less on IBM for process technology for 22nm. This again would support the idea that AMD wants a new design center in NY. I think it is entirely plausible that AMD could surpass IBM to become the senior partner in process development over the next few years.

23 comments:

Scientia from AMDZone said...

We can also talk about the recent Nehalem projected Spec scores.

EUV obviously won't be a factor until maybe late 2011 or early 2012.

A possible NY FAB would be 2012 at the earliest.

Aguia said...

Scientia I just don’t understand how AMD wants to do all that without increasing its market share?

Where will the money come from?

Besides there are great products going to be released like the 780G which will be probably be the best IGP ever.
An IGP the every Intel folks, partners even Apple would like to have but unfortunately will be limited to AMD platforms, at least it will make other AMD products look good.

Having great IPGs like the 690G and the soon to come 780G is a good prognostics for what could be coming from Fusion.

Randy Allen said...

If I may carry on from the previous discussion. Scientia, have you seen this document?

http://tinyurl.com/26qb5l

If the information is accurate then the CPU Intel is referring in the internal projections chart would be Gainestown, which is a quad core CPU. I think this makes sense since Beckton isn't due until 2009, and it is an MP server product when the chart is comparing DP performance.

Of course all this speculation isn't going to get us very far. There's still a lot we don't know about Nehalem. AMD's yet to provide much information on Shanghai as well, other than the fact that it should fit in the same sockets and has 6MB L3 vs 2MB L3 cache on Barcelona. Just what clockspeeds can Intel deliver Nehalem to? What sort of clockspeeds will AMD deliver Shanghai at? There are just too many unanswered questions to get an accurate idea on how things will look at the end of the year.

Aguia said...

Scientia about the details released of Nehalem and the "big" die and complex design, do you think AMD could try to undercut Intel by releasing a redesigned K10 with 256KB L2 for each core and 3MB/4MB L3 on 45nm?
AMD could undercut intel price by having a much smaller quad core CPU?

Even performing more poorly, four cores is for cores, marketing always wins engineering ;)


If Intel having a quad core Core 2 Duo at 3.0Ghz is already at 130W, do you think Nehalem will be clocked much lower (probably to the K10 Ghz levels) since the IMC, CSI, HT, and other stuff will probably increase the power consuming by a good amount?

Scientia from AMDZone said...

randy

Yes, if Hiroshige is correct then that would be Gainestown. I wonder though if that figure includes Turbo Mode.

Polonium210 said...

People can stop speculating on how
to improve Barcelona-AMD have ALREADY
done it.

Shanghai is NOT just a die shrink with a boost in L3 cache and clock speeds but ALSO has core improvements over Barcelona – this has been confirmed by AMD!

Randy Allen said...

Yes. It'll be some minor changes that will give something in the range of a 5 -> 10% performance increase at the same frequency which is a similar performance increase to what Intel got on average going from 65 -> 45.

No, they're not going to make any huge wild additions that would result in a massive IPC boost across the board. That will be saved for their next generation architecture. If they made massive changes across the board to the CPU core and tried producing it on a new process it would an utter DISASTER for their yields. That's why they'll take the smart route: take an existing design that they're very familiar with, add a few minor tweaks to boost performance by a small but noticeable amount and add more cache.

Randy Allen said...

Also, I don't know where people are getting the idea that 45nm = more clockspeed for AMD. When AMD went from 130nm -> 90nm and from 90nm -> 65nm they, at first, had a lower clockspeed.

If AMD is maxing out 65nm at 2.6GHz for quad core this year, I'd expect 45nm to be at 2.4 or 2.5GHz. During 2009 they'll increase the frequency to probably speeds around or slightly in excess of 3GHz.

Scientia from AMDZone said...

randy

I've been thinking that with all the hardware additions to K10 including doubled FP units, doubled buses, sideband stack optimizer, and COUNT execution unit I think new hardware in Shanghai is unlikely. I'm thinking that reducing the decoding time of some of the integer instructions is more likely. This might give you 3%. Although cache sensitive benchmarks could bump more than 10% I can't think that you would have any larger increase on non cache sensitive benchmarks unless there is a problem with K10 that needs to be fixed (which is possible).

The clock speed issue is exactly what I've been talking about. AMD has had slower initial clocks on new processes since it began using SOI. However, it is possible that 45nm could start at 2.8Ghz. This could be the case as I mentioned if AMD really did have a timing mismatch with its 65nm process.

enumae said...

Scientia
Likewise the tiny speed increases from 3.0 Ghz to 3.16 Ghz (quad core) and 3.33Ghz (dual core) are no doubt frustrating for Intel fans who would like more speed.


You missed the X5272 3.4GHz Dual Core.

This chart at Computerbase claims AMD will release an FX chip in Q2.

Actually the chart, as of 3-4-2008, is showing DVT samples in Q2 and Production/Availability in Q3. The top product for Q2 looks to be the 9850.

The shortages of chips have shielded AMD somewhat from increased presssure from Intel during Q4 and Q1.

Actually that is not likely considering where Intel released the 45nm parts, servers. AMD is likely to have another poor quarter due to market share loss in 2P servers and work stations.

Scientia from AMDZone said...

enumae

Thank you; I made some tweaks in the article.

enumae said...

What are your thoughts about Intel's revised 45nm ramp vs their previous 45nm ramp?

Bradley Coleman said...

great post. yeah, i was worried about IBM too.

but you missed puma. thats going to be a big deal, i hope.

i think 780g and a simple dual core chip, is the perfect sweet spot for the whole market. hope they can milk that.

and graphics are looking really nice. the 55nm chips are sweet, and the R700 is coming. lets hope its great.

Scientia from AMDZone said...

enumae

From what I can tell you have a new ramp estimate that is about 20% higher earlier in the year. This means that Intel gets to the good 25% volume mark at mid May instead of the end of May.

The 50% crossover point has moved forward about three weeks from just before mid October to just after mid September. But then with the slower ramp later in 2008 I'm not seeing any difference by mid November.

Basically, it looks like Intel changed the initial slow ramp to a faster ramp but then slowed the ramp later in the year. I would project a volume of only 65% by end of December instead of 70%.

From what I can tell, the ramp of FAB 32 is actually ahead of schedule so I must have been mistaken about delays at FAB 32. The FAB 28 ramp looks the same with only the FAB 11X ramp being slower.

bk said...

Scientia,

If you have any opinions or facts about the Intel Atom processor, I'd love to hear them. Also, how do you think AMD's Bobcat will compare.

Thanks,
Brian

Scientia from AMDZone said...

bk

Do you remember the hype before Cell was released? It was going to deliver a phenomenal amount of FP processing power, 10X greater than any existing processor. It was going to usher in a new programming paradigm. Deja vu; Intel says:

"designed specifically for a new wave of Mobile Internet Devices and simple, low-cost PC's. This small wonder is a fundamental new shift in design, small yet powerful enough to enable a big Internet experience on these new devices. We believe it will unleash new innovation across the industry."

Contrary to the claims, Cell has made almost no difference in computing and Intel faces similar problems:

1.) Intel is counting on a wave of new devices that fit in between current palmtops and thin and light notebooks. Atom is too big for palmtops but too weak for notebooks. This slot is already represented by the Asus Eee PC that Ou is fawning over. Notice that it runs fine with existing processors.

2.) Getting the extra power from Atom requires heavy multi-threaded programming. Neither palmtop processors nor notebook processors require this.

3.) Intel has no real presence in this area. AMD on the other hand has a large number of current customers.

It seems to me that we've heard almost the same hype about Intel's Larrabee. You know, the brand spanking new GPU that is going to take over the graphics world. However, I have to agree with what Adrian Kingsley-Hughes said about it:

"My guess is that if Intel is truly serious about making things tougher for AMD and nVIDIA, the chip giant is going to have to either start small and build the platform gradually (probably at a loss for some years) or get the old checkbook out and spend some serious money pushing Larrabee."

I think the same thing applies to Atom. However, even with a massive push it would take at least a year for any real market penetration.

Erlindo said...

Scientia:

What are your thoughts of AMD's Montreal processor?

It's supposed to be an 8-core native uArch, but the real question is if its going to have IPC improvements or is just two Shanghai cores stitched together?

muziqaz said...

I accidentally found this page from amd website :D
it has shanghai die shot :)
and some info about process technology.

http://www.amd.com/us-en/0,,3715_15503,00.html?redir=45nm01

Was I living under the rock, or this immersion lithography is something new? :)

bk said...

Thanks Scientia for your comments. I agree, these small, low power x86 processors will not take off overnight, but as process technology shrinks the size and cost of this type of processor couldn't it find its way into phone and palm type devices in the next few years?

Scientia from AMDZone said...

Yes, I'm certain that small devices will change to x86 based processors. Current processors in this market tend to be MIPS or ARM based.

AMD which already has a large presence in this market is going to start replacing its current MIPS based embedded processors with x86 units. However, replacing a single processor with another one is not the same as replacing with large scale multi-core.

Pop Catalin Sever said...

I doubt x86 for small devices will take off sooner than 2 years. The device world and embedded world is not dependent on x86 software, and most software, operating systems and libraries are ARM or MIPS, and you can't just recompile everything for x86.

Plus Intel will have to battle its way into mobile space the first years, and the costs for hardware supporting the the smallest x86 Mobile Windows version is higher than the harware running ARM Mobile windows.

The funny thing is Microsoft scrapped their x86 implementation of windows mobile starting with windows mobile 5.0 (prior to 5.0, Windows mobile 4.2 had x86 versions for development and debugging inside and x86 Emulator, but now the emulator emulates an ARM processor complete with motherboard and components) ...

Erlindo said...

Thanks for your time Scientia.

Seems that processor designing/architecting is a really tough job. :D

abinstein said...

Thanks for the information.

IMHO, while K10 can still compete with Core 2 on a number of server-grade performance, against Nehalem it doesn't seem to stand a chance. Nehalem and Shanghai have similar die size and supposedly similar production cost, but it seems to me with Nehalem's gain of QuickPath and IMC, Shanghai will be in a worse position than Barcelona.

What's your opinion?