Wednesday, February 28, 2007

2007: Where Are The Clock Speeds?

The most significant CPU event in 2006 was, without doubt, Intel's release of Core 2 Duo. This will be followed this year by AMD's equally significant release of K10. With a major release from both companies the world of microprocessors would be rosy indeed . . . if not for the nagging question of clock speeds.

Before Core 2 Duo was actually released in mid 2006 there were announcements that Intel would release 3.2Ghz C2D's later in the year. There were even persistent rumors by Intel enthusiasts that 3.2Ghz chips would be available at launch. The latest roadmaps seem to indicate however that even 18 months later, Intel will still be stuck at 3.0Ghz. This however doesn't seem to have dented the enthusiasm of the Intel faithful who were certain that 3.2Ghz chips would be available before the end of 2006 and that at least 3.4Ghz chips would be available before the end of 2007. Most have now simply resorted to chattering about 45nm (Penryn). Supposedly, Intel 45nm is going to allow phenomenal speeds at low power draw. And, these eager souls are hoping fervently that Intel will somehow be able to release 45nm in Q3 07, presumably to compete with AMD's K10. However, Q4 07 looks to be the earliest for 45nm from Intel and there is as yet no indication of higher clock speeds. AMD, not to be outdone, seems equally determined to deliver sub 3.0Ghz clock speeds. AMD gives no indication of getting faster than 2.9Ghz with dual core K10 on 65nm and only 2.5Ghz with quad core K10 in 2007.

So, where are the clocks? Why are AMD and Intel unable to keep increasing clock speed with 65nm and push through 3.0Ghz? One consideration is that AMD has had a history of second wave clocks. For example, the highest clock achieved on 130nm exceeded the initial clock speed of 90nm. And, the high clock on 90nm exceeded the initial speed for 65nm. If this pattern is followed then it would be logical that AMD could reach a higher clock on 65nm by the time 45nm is released. Perhaps this will be the case. The picture is much less clear with Intel since Intel has almost no track record of one architecture on multiple processes. The only crossover has been Smithfield/Presler. With these two we see no evidence at all of second wave clocks. While Smithfield topped out at 3.2Ghz on 90nm, Presler launched at 3.6Ghz.

This has, of course, happened before. In late 2002 Intel was stuck at 3.0Ghz while AMD was stuck at 2.0Ghz. AMD did manage in early 2003 to bump the Barton K7 up to 2.2Ghz and, at about the same time, Intel bumped the Northwood P4 up to 3.2Ghz. Intel eventually managed 3.46Ghz with Northwood on 90nm with its Extreme Edition in 2004. However, it certainly looks now like the clock ceiling has returned with both Intel and AMD stuck below 3.0Ghz. I suppose AMD enthusiasts might point out that AMD did have increasing clocks and only recently hit 3.0Ghz with FX-74 and 6000+ (on 90nm). The problem is that we see no indication of clocks beyond 2.9Ghz on 65nm during all of 2007 and up to Q2 08. Strangely, none of the Intel enthusiasts seem to be discussing the lack of a 3.2Ghz Conroe. I suppose if someone can forget that Intel promised a 5.0Ghz Tejas in 2005 and then promised Whitefield with CSI in 2006 then forgetting the lack of a 3.2Ghz C2D clock would be relatively easy. So, ignoring Intel's 18 month span with no clock increases, I suppose it is possible that 45nm really is much better and that Intel could deliver clock rates as high as 3.6Ghz in 2008. However, nothing like this has been indicated yet. And, with a history of second wave clocks I suppose AMD could hit 3.1Ghz on 65nm by mid 2008.

This still does not answer the question though. Since K8 is currently hitting 3.0Ghz on 90nm one would assume that 3.2Ghz would be possible on 65nm. So, why is K10 only hitting 2.9Ghz? I suppose with AMD the problem is the process. Presumably AMD can't soon get over 2.9Ghz without going above 120 watts. Looking at history for AMD this probably matches the release of K8 in 2003. K8 Sledgehammer was released at 1.8Ghz which was roughly equal to the 2.2Ghz Barton K7. This could suggest that the initial 2.3Ghz Barcelona will be roughly equal to the 2.8Ghz Santa Rosa Opteron. The speeds would also parallel the introductory speeds of dual core X2 which were down from the fastest single cores. This also suggests that the later release of 2.5Ghz Barcelona will match the current speed of 3.0Ghz K8. This would put the Q2 08 speed of 2.6Ghz ahead of the current fastest K8. However, it appears that QFX will likewise be stuck at 2.5Ghz. This does seem a bit slow to compete with Kentsfield, however, QFX is a dual socket board. Given Opteron's current near equality with Xeon at the same clock it seems somewhat possible that a dual socket 2.5Ghz QFX could keep up with a dual socket 3.0Ghz Clovertown competitor. However, this is not entirely clear since a true competitor would not use FBDIMM but DDR2 like QFX. So, perhaps Intel could stay ahead of QFX.

And, why is Intel still stuck at 3.0Ghz? In spite of claims that Intel has superior process technology the conclusion would have to be the same, that Intel is unable to clock higher. And, there is no similar history for Intel as there is with AMD. There has simply never been a time when Intel was unable to increase clock speed for 18 months. This is a year and a half with no improvement on the process. Very strange. It is possible that the early results for 45nm were so promising that Intel stopped developing 65nm. This could be the case. I also know that some will claim that Intel has lots of headroom because their chips overclock well. Unfortunately, bulk silicon chips are more prone to failure than SOI chips so Intel has to maintain significantly more margin than AMD. Simply put, careful overclocking by enthusiasts is not comparable to the same speed with a stock heatsink and fan in a standard case in a house with no air conditioning and high ambient temperatures in the summer. Still, I'm sure this myth of headroom will stay alive until Intel moves to SOI as well. If you can conveniently forget the 5.0Ghz Tejas then presumably you can also forget that Dothan, Yonah, and Prescott all overclocked significantly higher than the speeds Intel released. I suppose if Intel fans are guilty of amnesia then AMD fans would be guilty of over-optimism. I've seen people insist that K10 will have a 40% increase in Integer IPC which is purely ridiculous; 20% is much closer to reality.

In terms of single socket in 2007, AMD's competitiveness is somewhat split. For dual core, this would be a 2.9Ghz Kuma versus a 2.93Ghz Conroe. This is a trivial 1% difference in clock, so probably even. However, for quad core this would be a 2.5Ghz Agena versus a 3.0Ghz Kentsfield. This is a not so trivial 20% difference in clock. I'm guessing Intel will stay ahead on this one although I suppose being competitive with the second fastest clock (2.6Ghz) is a lot better than having no quad cores at all. All in all this should be sufficient to halt any gains in share by Intel. Additional gains in share by AMD would then probably depend on other factors like price, availability, and chipset quality. So, it does appear that 2006/2007 mirrors 2002/2003 in several ways. Perhaps we will once again see standard clocks above 3.0Ghz in 2008.

199 comments:

Intel Fanboi said...

Intel is pushing 3.0GHz dual cores from the Extreme/performance segment down into the mainstream segment. This is as impressive a technical/marketing feat as realeasing a 3.2GHz or 3.4GHz chip. I consider that to be quite a bit of progress for 12 months. The new Extreme/performance segment will be quad cores. Its really that simple. Thats where the higher clocks went...

Scientia from AMDZone said...

intel fanboi
Intel is pushing 3.0GHz dual cores from the Extreme/performance segment down into the mainstream segment.


Really? Does this mean then that E4300 is replacing Celeron?

This is as impressive a technical/marketing feat

You'll have to explain that one again. Exactly what has Intel done to push 3.0Ghz into the mainstream?

as realeasing a 3.2GHz or 3.4GHz chip.

as being unable to release a 3.2Ghz chip.

I consider that to be quite a bit of progress for 12 months.

No clock increases for 18 months is progress? What would stagnation be?

The new Extreme/performance segment will be quad cores. Its really that simple. Thats where the higher clocks went...

Well, that wouldn't explain why Intel hasn't increased the clock on dual core. Intel released QX6700 Kentsfield at 2.66Ghz last November. So you consider a clock bump from 2.66Ghz to 3.0Ghz in more than 12 months to be impressive?

Azary Omega said...

Firstable Scientia i disagree with you, i think K10 will be on average 5% faster than Core 2 when it comes to single threaded performance. And we yet to see how mush better will it be on multithreaded front, i know it will scales better than K8.

Also, can somebody tell what did meron had that yohan didn't? If I'm correct then that ~8% per clock performance bonus meron has over yohan are mostly attributed to better SIMD and ability to process two 64bit SEE instruction on same tic. In which case we can judge about how mush improvement will K10 going to get on by being able to do the same.

Ho Ho said...

scientia
"Really? Does this mean then that E4300 is replacing Celeron?

No, PentiumE and new Core2 based Celerons will replace current Netburst CPU's. I thought you knew that.

scientia
"Exactly what has Intel done to push 3.0Ghz into the mainstream?"

In Q3 it'll slash 65W 1.33GHz FSB 3GHz dualcore price to $266

At the same time, 2.4Ghz q6600 will be availiable for $266 also. New high-end quadcore will be at 2.93GHz.


Do you really think Intel needs new higher clocked CPU's when it will have so cheap high-end CPU's out on the market? Also I doubt that 3GHz dualcore at $266 will be the highest clocking dualcore for Intel. I bet there will be a speedbump some time.

Sal said...

What Ho Ho said.

Intel push E6850 65W mainstream, and only QUAD Cores are going to get the brand Extreme. No more dual-cores.

Therefore, the only Extreme processor in Q3 will be the QX6800, the Quad-Core 3Ghz.

QX6700 is re-introduced as Q6700 at a $530 mark, E6850 at $266, and Q6600 at $266.

Remind me again, why bump speed and get more powerhungry products, when it has no competition in the high-end? (Yet, atleast.)

Scientia from AMDZone said...

ho ho
In Q3 it'll slash 65W 1.33GHz FSB 3GHz dualcore price to $266


So, you are saying that the top range of pricing for dual core will be eliminated? I assume you are sayiing that this will be replaced by Kentsfield.

Do you really think Intel needs new higher clocked CPU's when it will have so cheap high-end CPU's out on the market?

Yes.

Also I doubt that 3GHz dualcore at $266 will be the highest clocking dualcore for Intel. I bet there will be a speedbump some time.

Yes, but apparently not in 2007.

Scientia from AMDZone said...

azary omega
i think K10 will be on average 5% faster than Core 2 when it comes to single threaded performance.


I suppose that is possible.

Also, can somebody tell what did meron had that yohan didn't? If I'm correct then that ~8% per clock performance bonus meron has over yohan are mostly attributed to better SIMD and ability to process two 64bit SEE instruction on same tic.

You are incorrect. Merom has at least 15% higher Integer IPC than Yonah and about double the SSE performance.

Scientia from AMDZone said...

sal
Intel push E6850 65W mainstream, and only QUAD Cores are going to get the brand Extreme. No more dual-cores.


Which still doesn't explain why Intel doesn't release a 3.2Ghz Conroe. Nor does it explain why Intel is only able to bump Kentsfield up only a single speed grade in more than 12 months.

Remind me again, why bump speed

I'm sorry you didn't understand this point from the article even though I thought I stated it clearly. 2.93Ghz is only 1% faster than 2.9Ghz. Therefore, anyone with common sense would assume that Intel would bump the speed up to 3.2Ghz to stay ahead of AMD.

Ho Ho said...

scientia
"So, you are saying that the top range of pricing for dual core will be eliminated?"

No, I'm just saying that 3GHz will be availiable for $266 in Q3. Currently there is no word of what will happen. IIRC, it was said somewhere that the price cut will be at 22 September.

Considering how low the TDP the new 3GHz dualcores will have, is it really impossible that by crancing up voltage and going all the way to 120W it is still impossible to get >3GHz from Core2? Especially when considering there will be nearly the same clocking quadcores availiable.


scientia
"Therefore, anyone with common sense would assume that Intel would bump the speed up to 3.2Ghz to stay ahead of AMD."

Well, AMD 2.9Ghz CPU's are still months away and lots of things can happen before their release. Also it is still not certain who has better performance clock-to-clock. If there is a need I'm certain Intel will release a higher clocking version of its CPUs.

Can anyone guess what might be the pricerange of AMD new CPUs? Will they be as expensive as new cores have always been at launch or will they drop to Intel's Core2 levels? Basically that would mean that Intel has 2.4GHz for $266 fighting against AMD two of the highest end quads at 2.3 and 2.5Ghz quads. It is similar with dualcores also with $266 3Ghz dualcore from Intel going against 2.9GHz dualcore from AMD.

It will be an interesting year, that's for sure.

Sal said...

Scientia.

Why 2,93? It's 3Ghz! Personally I think K10 will be somewhat faster than Core clock on clock. But then again, since they will have a 65W 3Ghz 1333FSB part in Q3, contrary to the 2,93Ghz 75W 1066FSB part now means that they have a more matured 65nm process.

So if they will, I'm betting they can push out a ~80W >3Ghz part.

Or do you think that Intel CAN'T bumb speeds on the Core arch? It's all about competition, and how much K10 gives Core.

spam said...

FX sells in pairs. FX Barcelona at 2.5GHz will sell for $1000 paired, or ~$500 single.

Intel's 3.0GHz will cost $1000, almost twice as much. It better perform a whole lot better for double the price of the AMD chip...

Roborat, Ph. D. said...

And, why is Intel still stuck at 3.0Ghz?

Several reasons and I’m quite sure it’s not because of any technology barrier. We’ve seen no many OC’ers reaching well above 3GHz air cooled. Intel can easily slab a thicker Prescott heat spreader on any C2D if it wanted to just to solve any reliability concern.
The question you should be asking is why would Intel want to be more ahead that it needs to? I honestly don’t see any benefits in increasing the clock any time soon. AMD’s best offering is stuck between a 6600 and 6700. From a business point of view, it’s easy to see Intel’s optimised product positioning strategy for maximum profits. Get your product in the best position as possible (max sales) and then move your competition in the worst possible segment (min competitor sales). It’s easy to see how Athlon X2’s become more attractive if they go any cheaper. Continuously driving down your competition will result to tougher competition at the low end. You also need to factor in the yield benefits Intel gets by not loading products at the tip of its process capability. At the moment with such headroom, Intel should be getting the most out of their production. You have the current situation as evidence that Intel’s strategy is most effective for them while devastating for AMD.


Unfortunately, bulk silicon chips are more prone to failure than SOI chips so Intel has to maintain significantly more margin than AMD.

Of all the things SOI is good for, product reliability isn’t one of them. “Prone to failure” is such a broad term that it is easy for you to defend such claim so I won’t go there. Technically, latching up and leakage isn’t a device failure which SOI is supposed to have an advantage. Current uarch’s from both camps have already offset whatever advantage SOI has. In the mean time Intel has the cost advantage.

Ho Ho said...

spam
"FX sells in pairs. FX Barcelona at 2.5GHz will sell for $1000 paired, or ~$500 single.

If I may ask, where did you get that information that new top of the line FX'es will also sell for $1k? If you have any kind of information about Barcelona prices I'd be very interested to hear about them.

Also 4x4 is not exactly very common platform and most people will want single socket things.


As for OC'ing, I have run e6300 at 3.2GHz for months without downtime while crunching Seti@Home. Same with e4300 at 3GHz. Both were at their default voltages. I don't use some kind of fancy cooling, I even don't have a single case fan, only PSU sucking air out of the case. I also have 5 HDD's heating the case and room temperatures usually in the range of 20-25C at winter and >25C at summer. During the last half a year I haven't experienced crashes that had been caused by unstable hardware. It kind of makes me doubt that Intel doesn't have quite a lot of room for clock speed improvement, especially considering the TDP of the new high-end dualcore.

Scientia from AMDZone said...

Okay, I don't see any reason for anyone to make any further "Intel could make a higher clock if they wanted to" arguments since these are pretty absurd.

AMD will be at 2.9Ghz on dual core; Intel will need 3.2Ghz to stay ahead and no such speed is indicated by Q4 07. Dropping the price of Conroe would be a further reason to have a higher value higher clocked chip.

The "Intel has lots of headroom because I can overclock" argument is also absurd. People claimed the same overclocking headroom for Prescott, Dothan, and Yonah yet higher clock speeds were never released. Bulk silicon does not have the same thermal stability as SOI. This is why bulk silicon is not used for processors on car engines. This is also why Intel has to maintain a higher margin than AMD. Overclocking by experienced people who monitor the chip and provide good conditions is not the same as rating the chip at that speed under all conditions.

As far as price goes, Intel is currently selling P4 and Celeron below AMD which is why eMachines' current offerings are all Intel based.

Why 2.93? Conroe's current fastest speed is 2.93Ghz, not 3.0Ghz. Woodcrest is 3.0Ghz.

Roborat, Ph. D. said...

… Bulk silicon does not have the same thermal stability as SOI. This is why bulk silicon is not used for processors on car engines. This is also why Intel has to maintain a higher margin than AMD.

While it may be true that bulk silicon is inferior to SOI in thermal performance, it is incorrect on your part to quickly assume that 2.93GHz C2D is at the edge of its thermal limit. The size of the heat spreader together with the rated TDP easily points to a viable headroom when compare to previous desperate offerings from Intel (Prescott).
The evidence is out there to prove that that C2 is not thermally limited and can bump speeds > 3Ghz. On the other hand, you have no evidence to suggest that C2 on Bulk CMOS technology is thermally limited at 3GHz so why are you quick to assume your theory is correct while easily dismiss everyone else’s proven, corroborated, verifiable evidence?

enumae said...

Scientia

Do they need a faster clocked dual core right now or even until the release of K10 processors?

----------------------

You said it yourself, you think they'll be about even (dual cores), but how will AMD stop Intel's gains and even reverse the gains if there product is performing the same?

K10 needs to be about 20% faster or they will have to match Intel's prices.

Looking at the rumored price cuts in Q3, if a 3.0GHz dual core is $266, or a 2.4GHz quad core $266 what kind of impact will this have an AMD's ASP's?

What are the long term effects for AMD if there ASP's continue to decline even with the launch of a new product?

----------------------

I have said in the past that Intel is going after AMD's wallet, like it or not that is exactly what they will be doing in Q3 and Q4.

Scientia from AMDZone said...

roborat

What is proven, corroborated, and verifiable is that Intel has never released clock speeds as high as overclockers claim the chips can do since the release of Prescott.

It is well documented that Intel maintains a higher thermal margin than most overclockers believe is needed. This was true of Prescott, Dothan, and Yonah; and has been the case so far for C2D. Obviously, C2D can overclock well above 3.0Ghz. My statements about C2D are just a projection of what Intel has been doing for the past three years. If you think Intel is going to do something different than it has been doing you'll have to explain why.

enumae
K10 needs to be about 20% faster or they will have to match Intel's prices.

This isn't true. There are other factors besides performance that make a difference. I doubt AMD will match Clovertown's price when Barcelona is released. For example, I would expect the 2.3Ghz Barcelona to be priced higher than 2.3Ghz Clovertown.

Okay, you believe that Intel is trying to cut prices extremely low. It's a nice theory but it would never work in practice since Intel would take a huge hit in revenue.

The idea that Intel will essentially dump quad cores on the market is more interesting. I suppose a case could be made that Intel could produce a much larger quantity of quad cores for a lower price than AMD. This wouldn't work in servers but perhaps on the desktop.

Erlindo said...

enumae wrote:
I have said in the past that Intel is going after AMD's wallet, like it or not that is exactly what they will be doing in Q3 and Q4.


I guess is the other way around.
On this moment, AMD is slashing prices even more just for sake of achieving their 30% market share goal. Once they get this, it would be very difficult for intel to recover this back. You can be sure that once AMD achieves this goal, they can charge a premium for K10 in the mid-long term and start to make a profit the way they used to.

Intel is kinda desperate about this and they now that if AMD meets their 30% market share, their monopoly of the microprocessor market would be screwed for ever and ever. That's the reason why they (intel) don't give much importance on profits right now but instead, they're thinking to cut prices further more.

Ho Ho said...

scientia
"What is proven, corroborated, and verifiable is that Intel has never released clock speeds as high as overclockers claim the chips can do since the release of Prescott."

With all but Core2 the problem was either excess heat (desktop) or power usage (laptops).

With Core2 Intel does not (yet) have competition in the high end. There is no reason to release a faster chip just to compete with yourself.

We currently know Intel will release 2.93GHz quad in Q3 (September) and will drop 3GHz dualcore to midrange price level. We don't know for sure if it will release higher clocking CPUs or not. As it has very low TDP with that 3GHZ there is a very good chance there might be a faster clocking CPU coming, probaby together with the price drop.


"My statements about C2D are just a projection of what Intel has been doing for the past three years."

I hope you do know that Netburst had major hotspot and leakage problems. Core2 does not, at least not nearly as big. They are two completely different architectures. You can't really make good comparisons like that.


"This wouldn't work in servers but perhaps on the desktop."

It probably will work well for the biggest server marketshare, 1P and 2P. Perhaps even with Tigerton, assuming that FSB is not a bottleneck for the customers.

enumae said...

Scientia
It's a nice theory but it would never work in practice since Intel would take a huge hit in revenue.

If this does not show Intel is lowering Server prices as well as the reported Desktop cuts... well then there is no debating with you.

------------------

Intel knows that if they can dictate AMD's prices or ASP's, AMD will not be able to expand (future capacity) and that 30% market share will be very short lived (as the market grows), especially if Intel decides to make quad core mainstream, like it seems it is doing.

Like I said, Intel is attacking AMD's wallet and any future plans that AMD may have.

Scientia from AMDZone said...

ho ho

Neither Dothan nor Yonah had problems with heat and neither was netburst. Try again.

Scientia from AMDZone said...

enumae
If this does not show Intel is lowering Server prices as well as the reported Desktop cuts... well then there is no debating with you.


The link does not show a drop in server prices. I have no idea what you are looking at but:

Current X5355 - $1172
Future X5365 - $1172

Where is the price drop?

Current X6700 - $999
Future X6800 - $999

Again, no drop in price.

There is a price drop for the second rank:

Current Q6600 - $851
Future Q6700 - $530

So, you haven't shown any drop at all for server chips but it does appear that quad core desktop chips below the top rank will fall in price.

Ho Ho said...

scientia
"Neither Dothan nor Yonah had problems with heat and neither was netburst. Try again."

You call 75C with inbox cooper buzzing around at 6000RPM and wihtout any OC "no problems"? What about 165W TDP server CPUs and 115W midrange CPUs?

If you tried to OC Netburst more than couple hundred MHz you absolutely had to get a decent cooling. I had 2.8GHz Northwood. With Zalman 7000 cooler I coul OC it up to 3.2GHz, no more. 3.2GHz Prescott went up to 3.8 GHz with Zalman 9500 at full speed and opened case, temperatures were arond 85-90C. 65nm P4D 920 also went to 3.8GHz and had relatively low 75C temperatures but still rather high. The one who sold me that P4D was running it at 4.5GHz on water and it was awfully hot for him also.

What exactly made you think Netburst didn't have heat problems? I thought it was common knowledge. Excess heat was what was keeping Netburst from reaching the clock speeds Intel was talking about in '04 and '05. Prescott was designed to run at between 5-8GHz but heat problems were way too big.

What do you think, is it possible for Intel to release >3GHz dualcore this year when it increases its TDP from 65W to higher levels?



"So, you haven't shown any drop at all for server chips"

Say what? Intel lowers prices of its current CPUs and will introduce new and faster CPUs to take place of the older flagships. Since when this isn't a price drop?

Scientia from AMDZone said...

ho ho
If you tried to OC Netburst more than couple hundred MHz


Clue to ho ho: Neither Dothan nor Yonah was a netburst architecture. Both were derived from Pentium M.

Intel lowers prices of its current CPUs and will introduce new and faster CPUs to take place of the older flagships. Since when this isn't a price drop?

It isn't a price drop; it's just a category shuffle. If the prices for each rank stay the same and Intel expects to make the same ratio at each rank then it will make the same amount of money with the same volume.

Genuine cuts in price imply that Intel would make less money with the same volume.

Ho Ho said...

scientia
"Clue to ho ho: Neither Dothan nor Yonah was a netburst architecture. Both were derived from Pentium M."

Yes, I know that. They were both mobile CPUs and they couldn't be clocked much higher when you wanted to keep the battery working long enough. When you bought an adapter you could easily OC Pentium M at rather high levels compared to the default settings. Though it didn't overclock nearly as well as Core2 does.

Also, you stated that Netburst didn't have heat problems. I said otherwise and brought examples.


"It isn't a price drop; it's just a category shuffle."

That should mean there haven't been a single price drop in years. High-end CPU has almost always cost around $1000, at around last five years.

Also, would that mean that Intel really won't have lower ASP? As you said, it really doesn't have a price cut.

"Genuine cuts in price imply that Intel would make less money with the same volume."

Interesting. I always thought that when I see CPU X with its price lowered by Y% you can say it had a price cut.

enumae said...

Scientia

I would expect this from Sharikou, not you...

Xeon X5365 $ - $1172 = 0%
Xeon X5355 $1172 - $744 = 37%
Xeon X5345 $851 - $455 = 47%
Xeon E5335 $ - $316 = 0%
Xeon E5320 $690 - $256 = 63%
Xeon E5310 $455 - $209 = 55%
Xeon L5320 $519 - $320 = 39%
Xeon L5310 $455 - $273 = 40%

Xeon X3230 $ - $530 = 0%
Xeon X3220 $851 - $266 = 69%
Xeon X3210 $690 - $224 = 68%

Say what you like, but this is substantial, and will directly effect AMD's ASP's when K10 launches.

--------------------

Now if you look at desktop prices, an E6850 will be about $266, and todays equivelant would be the X6800 at $1000, and that is to be the most expensive dual core they will have for desktops, how will AMD not have to follow suit if they are equal?

Again, Intel is going to hurt AMD's future plans with these prices unless AMD seeks more loans.

spam said...

I know this is not at all reliable, but this is the source:

http://www.imagemule.com/uploads/amdk10sm4YSFr.jpg

However, for the most part, I'm using past history as a guide. The current FX chips (up to 3GHz) sell for around 1k a pair, and the 6000+ (also 3GHz) sells for less than half.

So, it seems that you will be able to get an Athlon X4 2500 @ 2.5GHz for less than half the Barcelona FX pair, which cannot realistically sell for much more than 1k a pair.

Even if the FX pair costs $1500 (which is very unlikely), the X4 2500 @ 2.5GHz will still end up costing $300 or more less than QX6800... I just don't see AMD splitting up the FX pairs, I don't see AMD charging more than $1200 a pair, so I suspect that AMD's top of the line QC chip will be priced around an agressive $500.

Scientia from AMDZone said...

enumae and ho ho

Okay, I'll try to simply this for the two of you. If both AMD and Intel introduce new chips and leave the price per rank the same (even if an individual speed of chip changes price) then there is no competitive change in price structure.

The only way that Intel can increase price pressure on AMD is if it lowers the price for all ranks or it introduces a new top rank chip at the same price and AMD does not introduce a new chip. Do you really not understand this?

enumae said...

I am aparently not getting this, and I know we have talked about this before.

For simplicity, since we can not figure out ASP's due to not knowing the actual number of processors sold for each model, and I mean simplicity we will assume it is an even mix across the board...

If you total the prices for the processors I showed (current prices) it will total $5,683 divided by 8 processor models you end up with an ASP of $710, again this is putting it in a simple sense.

Now look at the new prices (expected Q3), they total $4,765 divided by 11 processors you end up with $433, again simplicity, but this is a reduction of 40% while adding more processors.

I am not trying to be stubborn, but I just don't get it because the way I am looking at it it would seem to be an enormous price reduction.

------------------------

Another view would be that it is not like Intel is loosing money if there ASP for Server chips was $433, and could very well be setting up 45nm for a Q4 release to counter lower ASP's.

Azary Omega said...

Will there be a trace cache in K10? Sorry but this question is off topic.

Scientia from AMDZone said...

Neither C2D nor K10 use a trace cache. The trace cache was an attempt to overcome problems with the longer pipeline on P4.

Jeff said...

I see your line of reasoning, Scientia, but if Intel can deliver on their promise of 3GHz quads it stands to reason that they can release duals one or maybe even two speed grades above them.

Scientia from AMDZone said...

enumae
the way I am looking at it it would seem to be an enormous price reduction.


Okay, I can see why you would think that. However, your chart is incorrect. The prices for E5320 and E5310 had already dropped below the initial price. The actual change in the chart is only about 5%.

Scientia from AMDZone said...

jeff
I see your line of reasoning, Scientia, but if Intel can deliver on their promise of 3GHz quads it stands to reason that they can release duals one or maybe even two speed grades above them.


Yes, it would seem reasonable but there is no indication of any speed higher than 3.0Ghz for any chip during 2007. Possibly Q1 08.

Jeff said...

Scientia
Yes, it would seem reasonable but there is no indication of any speed higher than 3.0Ghz for any chip during 2007. Possibly Q1 08.


Sure, there are no 3.2GHz chips on the roadmap, but if Intel can make 3GHz quads, they can probably make 3.2-3.4GHz duals using the same chips. And against K10 @ 2.9GHz, why wouldn't they? I suppose it's possible that all the top chips are being used for quad and not dual, but that wouldn't stop Intel from reallocating some of those chips to compete with dual core K10.

enumae said...

Scientia
The prices for E5320 and E5310 had already dropped below the initial price.

Ok, looking at current prices for both the E5320 and the E5310 (as found on NewEgg), the current (simplistic) ASP would be about $674, compared to my previous $710.

Previously, the projected (simplistic) ASP's in Q3 were $433.

Again with a very simplistic approach we see a reduction of 36%.

Where do you get 5%?

Rather than 63% I had on the E5320, I now have 49%, also on the E5310
we now have 42% rather than the previous 55%.

I would like to understand you, so please, where do you get 5%?

---------------------

On a side note, with the a extremely simple approach I have used, and looking at Intel's projected ASP's, do you think this could effect AMD's future plans for expansion, transition to 45nm etc...?

Ho Ho said...

scientia
"Yes, it would seem reasonable but there is no indication of any speed higher than 3.0Ghz for any chip during 2007. Possibly Q1 08"

Now question is if intel can't release higher clocking dualcores or it doesn't have to do it.

My guess is that it doesn't have them on the pulbic roadmap yet but if there is a need it can release them. Tehcnically there is should be nothing stopping it.

Scientia from AMDZone said...

enumae

5% drop comparing rank to rank. As I've said before, if Intel introduces a new chip and bumps each chip down a price grade then this only effects AMD if AMD does not release a new chip of their own. The Barcelonas are all new chips so the effect won't be that great.

The above 5% drop in price would have no effect on AMD. Even assuming that Intel did more than this like releasing 3.2Ghz chips it wouldn't effect AMD's 45nm launch. I suppose it could delay construction on a new Fab.

Scientia from AMDZone said...

ho ho
My guess is that it doesn't have them on the pulbic roadmap yet but if there is a need it can release them. Tehcnically there is should be nothing stopping it.


History suggests that Intel can't rather than won't. You still don't understand about the overclocking margins and apparently not about the marketing either. The simplest way I can say this is that if Intel could release a 3.2Ghz chip then they would do it when Barcelona is launched. Intel did this in 2003 with EE to counter FX even though the EE chip was not available until 2004. Likewise, Intel released faster FSB versions of Xeon. Again, history is on my side.

Jeff said...

Scientia
History suggests that Intel can't rather than won't.


But 3GHz quad core chips suggests that Intel *can* if it wants to. If two chips in a multi chip package can clock to 3GHz it goes without saying that one of those chips could clock significantly higher by itself.

This makes it hard to understand Intel's behavior. Perhaps Intel is planning on releasing higher clocked duals but hasn't said anything yet? The only other logical explanation that I can think of is that Intel is planning a massive quad core push (do they have the capacity for this?), and relegating dual cores to the mid-low end.

Scientia from AMDZone said...

jeff
Perhaps Intel is planning on releasing higher clocked duals but hasn't said anything yet?


If this is the case we'll find out in Q3 because Intel will match AMD's K10 dual core launch.

The only other logical explanation that I can think of is that Intel is planning a massive quad core push

Look here Intel Desktop Production. This indicates 8% of desktop production is quad core in Q3 which would mean no more than 15% in Q4.

(do they have the capacity for this?), and relegating dual cores to the mid-low end.

Not until 45nm ramps up in 2008.

enumae said...

Scientia

I think I understand what your saying, so I have made a PDF and am hoping you could comment on it. I hope this is what your implying by saying "if Intel introduces a new chip and bumps each chip down a price grade".

Still seems like more than 5%.

Link to PDF

Greg said...

For AMD, releasing higher clocking processors than necessary is an extremely bad idea. They need to milk every dollar they spend in research to get profit from their performance margins.

For Intel, this is completely different. They are many times larger than AMD in terms of assets, manufacturing bulk, and individual transistor performance. If they actually wanted to crush AMD, they would release higher clocking chips. It's not Intel's fault, if they're innocent of illegal business practices, if AMD collapses as a company.

Also, in terms of reliability, sticking a thicker heat spreader on a processor, increases the distance to the actual point of heat dissipation, which increases resistance to thermal transfer, so that would be a bad idea.

Also, AMD's ASPs are only affected by what price AMD CHOOSES to price their processors at. Yes, this is somewhat dependent on what Intel prices theirs at, but AMD still gets to choose whatever price it thinks is best. Seeing how there is currently a premium (in terms of demand) on AMD processors, I don't think they have to worry too much about matching Intel's pricing scheme exactly, and probably wont for some time.

This also leads to why AMD wont lose share if it MATCHES price/performance or just performance. The market demands diversity of product, whether the product is necessarily inferior or not.

Ho Ho said...

scientia
"History suggests that Intel can't rather than won't."

Do you honestly think that CPU production is so predictable?

If I remember correclty, some time ago it was said on this blog that Intel couldn't release 3Ghz quadcore this year, definitely not at 65nm. Something similar was said about lowering TDP of its high clocking dualcore CPUs. It seems like Intel can and will do both.

Are you claiming that around 3Ghz there is some kind of magic barrier that Intel can't cross, no matter what? Even when they increase the TDP 100% from 65W to 130W? Even when they have 3Ghz quadcores they still can't produce significantly higher clocking dualcore? All the "proof" you have given so far is based on history. History of completely different CPU architectures and production technologies.

bk said...

Jeff
But 3GHz quad core chips suggests that Intel *can* if it wants to. If two chips in a multi chip package can clock to 3GHz it goes without saying that one of those chips could clock significantly higher by itself.

Could someone explain why it is any harder to produce a quad with two dual cores that clock at 3GHz vs. a single dual core that clocks at 3GHz. The logic Jeff proposes makes no sense to me.


HoHo
All the "proof" you have given so far is based on history. History of completely different CPU architectures and production technologies.

And what proof have you given?

enumae said...

Greg
Also, AMD's ASPs are only affected by what price AMD CHOOSES to price their processors at. Yes, this is somewhat dependent on what Intel prices theirs at, but AMD still gets to choose whatever price it thinks is best.

Sorry Greg but which is it, only or somewhat, it can't be both since they contradict each other.

Also, do you think that AMD lowered prices on Desktop and Server becuase they wanted to?

Both Intel and AMD's ASP's are effected by one another.

Seeing how there is currently a premium (in terms of demand) on AMD processors, I don't think they have to worry too much about matching Intel's pricing scheme exactly, and probably wont for some time.

How is there a premium in terms of demand when AMD lost Server market share in Q4?

Now whether or not they continue is unknown.

This also leads to why AMD wont lose share if it MATCHES price/performance or just performance.

This may hold true for people upgrading, but not for a new purchase.

Why pay a premium for the same performance?

The market demands diversity of product, whether the product is necessarily inferior or not.

But to think they will pay more for an inferior or equal product is wrong, unless upgrading.

Greg said...

The prices they choose are the only thing that dictates their ASP's. Intel's pricing scheme does effect what AMD chooses to put its processors at, but is not the deciding factor. Thus, Intel's pricing can be said to influence AMD's ASPs, but not affect them.

I think AMD lowered prices because they wanted to keep the image of their processors as the best bang/buck. I don't necessarily think this was a good idea, but that's what they did.

The same thing goes for Intel as what I said about AMD's ASPs.

AMD lost server market share because it focused product volume elsewhere, and because Intel released and sold new and more product during that time. AMD is already at its maximum capacity so it could not do this.

I'm talking mainly about overall ASPs. Chances are, when AMD has a better product, they can require higher price/performance than they did before, since there is more validity in a sort of price premium at this point. This will not be true of the channel, as the end consumer mainly affect prices here, but it will be true of the high-volume players like Dell, Lenovo, and Founder.

They will pay more for an inferior product if they get to use it as pricing leverage against Intel. No, they don't negotiate prices with Intel anymore, but Intel will lower prices to meet lower demand.

Scientia from AMDZone said...

enumae

I looked at your pdf. I have not examined the X3xxx series or L5xxx series in detail. But if you look at the X5xxx and E5xxx series you can see that the top four price grades are barely changed. It's a difference of less than 7%. If you add in the lower E5xxx grades with current prices then the drop is only about 5% total.

The original prices on the L5xxx series does not look right since these low power versions should be priced higher than the equivalent regular power versions (L5320 vs. E5320). The newer prices for the L5xxx series looks correct.

The X3xxx series being the older P4 Xeon architecture is probably being heavily discounted so I would say that this series does show a large price drop. However, this price drop is not as significant since the newer 7100 series Tulsa chips are not being discounted.

Scientia from AMDZone said...

ho ho

Refrain from the ad hominem attacks.

Your post edited:

bk
"Could someone explain why it is any harder to produce a quad with two dual cores that clock at 3GHz vs. a single dual core that clocks at 3GHz"

Why will AMD have 2.5Ghz quads and 2.9Ghz dualcores? Ansver is simple: heat. Same goes for Intel. Also I'll remind you that in Q3 Intel will release 65W 3Ghz dualcore, 120W 2.94Ghz quadcore desktop CPU and 3Ghz quadcore Xeon.


"And what proof have you given?"

1) Intel will have 3Ghz quadcores
2) Intel will have 65W 3Ghz dualcores
3) Core architecture is know to OC extremely well even in not-so-well controlled environment. Many people have tested that you can easily OC your C2D CPU 20-30% at minimum with the default cooling unless your motherboard can't tolerate high FSB. I haven't heard yet that so low OC would even need any voltage bumps.

Only thing missing is official announcement. If there is no need for higher clocking dualcore there won't be any. I guess that by Christmas there will be something to fight against 2.9Ghz K10 based dualcores.

greg
"I think AMD lowered prices because they wanted to keep the image of their processors as the best bang/buck."

"AMD is already at its maximum capacity"


So, if AMD is at maximum capacity then why does Intel lower its prices? It can't lose marketshare to AMD, at best it could win a bit of it back.

Ho Ho said...

scientia
"The X3xxx series being the older P4 Xeon architecture"

These are actually 1P quadcores

Scientia from AMDZone said...

BK

With Intel's MCM package a quad core is double the power of dual core. So, if Intel can do a dual core for 60 watts or less then they can do an MCM quad core and stay under 120 watts.

With AMD it is similar although AMD's quad core power draw is less than double the dual core power draw because the memory controller and HT links are not doubled.

Greg

You are off a bit on two points. First, AMD's processors are not currently selling at a premium; they are actually about one price grade below Intel's. AMD did this to maintain volume share. Secondly, even if AMD were at maximum capacity they would still be sure to provide enough of the low volume/high margin server chips. Therefore this is not why AMD lost server share. The actual reason is that Woodcrest is just a really good processor. Woodcrest has double the SSE power of Yonah with a lot less power draw than Prescott. Woodcrest is roughly equal in Integer performance to Opteron while having much better SSE performance. Another factor was that AMD could not stay ahead on power draw with 90nm versus Intel's 65nm. This is the chip that Intel buyers were waiting for; you should see a similar surge for AMD when K10 is released.

Also, I'm certain that AMD will price its K10's slightly higher than the C2D prices.

Scientia from AMDZone said...

ho ho
scientia
"The X3xxx series being the older P4 Xeon architecture"

These are actually 1P quadcores

Okay, my mistake.

Ho Ho said...

scientia
"With Intel's MCM package a quad core is double the power of dual core"

http://www.intel.com/products/processor/xeon/specs.htm
X3220, 2.4GHz, quadcore 105W
3060, 2.4GHz, dualcore 65W

From two to four cores there is ~62% TDP increase.

At 2.66GHz X5355 has 120W TDP and 5150 has 65W. That is ~85% TDP increase. IIRC the new quadcore 3GHz Xeon should have 120W TDP and 3GHz dualcore 65W TDP.

Seems like either Intel rates its dualcores lower than they really are or for some weird reason MCM doesn't increase TDP two times.

Scientia from AMDZone said...

ho ho

Intel's MCM is 2x the power draw of dual core. It is impossible for it to be otherwise since it is the same as two individual chips. Both AMD and Intel have chips that draw varying amounts of power and these are simply sorted into the various categories. Obviously, if a given quad core is only drawing 65% more power it is because the two dies are each drawing 17% less.

TheKhalif said...

You said it yourself, you think they'll be about even (dual cores), but how will AMD stop Intel's gains and even reverse the gains if there product is performing the same?

K10 needs to be about 20% faster or they will have to match Intel's prices.

Looking at the rumored price cuts in Q3, if a 3.0GHz dual core is $266, or a 2.4GHz quad core $266 what kind of impact will this have an AMD's ASP's?

What are the long term effects for AMD if there ASP's continue to decline even with the launch of a new product?

----------------------

I have said in the past that Intel is going after AMD's wallet, like it or not that is exactly what they will be doing in Q3 and Q4.





Intel is going after AMDs wallet but they seem to getting larger YoY drops on all indicators so they are taking money out of their own wallets too

This could extremely backfire if you do have a 40% improvement over C2Q and AMD drops Barcelona at the original dual core Opteron prices. That will wedge C2 in between K8 and K10 in price and perf.

And with Barcelna ready for PCIe, HT and HTX Torrenza products they will be the darling of the server world. 1TFLOP will get a lot of wins in HPC and WebFarms.


As far as K10 only offering 10% int improvement I doubt it.

OoO
2 loads/cycle
128b 32B fetch
sideband optimizer
dual vector SSE128(int and fp)
direct to L1 copies
more branch history

That will add up to (no less than) 40% above K8 which is about 20% above C2D.

TheKhalif said...

Intel knows that if they can dictate AMD's prices or ASP's, AMD will not be able to expand (future capacity) and that 30% market share will be very short lived (as the market grows), especially if Intel decides to make quad core mainstream, like it seems it is doing.


Isn't that abuse of its monopoly?

Ho Ho said...

scientia
"Obviously, if a given quad core is only drawing 65% more power it is because the two dies are each drawing 17% less. "

So it shouldn't be too difficult to find those lower power using dualcores and sell them as higher clocking ones.


thekhalif
"That will add up to (no less than) 40% above K8 which is about 20% above C2D."

I hope you know those listed things are present in Core2. I can't imagine how could duplicating them suddenly give 20% more performance.

Erlindo said...

ho ho wrote:
I hope you know those listed things are present in Core2. I can't imagine how could duplicating them suddenly give 20% more performance.


Sorry, but C2D is not 20% better than K8. There are cases where K8 trumps C2D and as many have said over here, C2D is only 10-15% better overall.

TheKhalif said...

I hope you know those listed things are present in Core2. I can't imagine how could duplicating them suddenly give 20% more performance.



Look at it like PD - Core 2. PD had none of that and C2 came out 70% faster.

Ho Ho said...

erlindo
"Sorry, but C2D is not 20% better than K8."

I wasn't saying that. I was just doubting that duplicating Core2 features in K10 would make K10 20% faster than Core2.

thekhalif
"Look at it like PD - Core 2. PD had none of that and C2 came out 70% faster."

70? Even Intel itself didn't say it was that much faster. All it said it was gave 40% more performance at 40% less power usage. Also Netburst was lacking a whole bunch of other things too and was in general rather inefficient, a lot more inefficient than K8. Giving K8 the features of Core2 won't make the difference that Netburst to Core2 was.

Scientia from AMDZone said...

ho ho
So it shouldn't be too difficult to find those lower power using dualcores and sell them as higher clocking ones.

Theoretically you could. I suppose it is possible that higher than 3.0Ghz chips are not showing up on the roadmaps yet but that Intel could release them. I think the most sensible thing if Intel is able to release a 3.2Ghz dual core part would be to release it in Q3 07 when AMD releases its K10 version of dual core. Personally, I would think that a 3.2Ghz Conroe could stay a little ahead of a 2.9Ghz Kuma.

thekhalif
That will add up to (no less than) 40% above K8 which is about 20% above C2D.

K10 should be about double the SSE power of K8. However, in terms of integer I'm only thinking about 20% improvement. I would rate the odds something like this.

Chances of % Integer improvement:
Improvement - Likelihood
10% - 99%
15% - 93%
20% - 75%
25% - 50%
30% - 25%
35% - 10%
40% - 3%

Scientia from AMDZone said...

enumae

The INQ is saying AMD Price Cuts

CHIP MAKER AMD is to cut the price of many of its desktop processors on April 9th.
From that date the price of the firm's Athlon 64 X2 dual-core 6000+ will be chopped virtually in half. Also savagely sliced is the dual-core 5600+ - down 43 per cent. Other dual-core offerings are down by between 20 and 30 per cent.


If this is true it is a surprise because obviously there won't be any new K10 dual cores in April, not until Q3. Also, I don't know if AMD could release a 6400+ which would have to be clocked to 3.2Ghz. Without a new higher clocked chip this would certainly be a huge reduction in desktop prices. If AMD does not release a 6400+ this could make for a pretty bad second quarter in terms of revenue.

abinstein said...

jeff
"If two chips in a multi chip package can clock to 3GHz it goes without saying that one of those chips could clock significantly higher by itself."

Why would single chips clock "significantly" higher than two in an MCM? It sounds like a single-socket server could clock much higher than a dual-socket one. Does it make sense?

Or do you suggest that MCM packaging would impact chip clock speed? If so then I think there's some problem with the packaging...

abinstein said...

"Obviously, if a given quad core is only drawing 65% more power it is because the two dies are each drawing 17% less."

Certainly not as much as 17%. There's a lot of power spent on external pads. With 1GHz FSB, I'd say this power won't be lower than 10W no matter how low-power your die is.

Ho Ho said...

scientia
"If this is true it is a surprise because obviously there won't be any new K10 dual cores in April, not until Q3."

Was there supposed to be? The rumours I've heard put K10 launch into May or perhaps even to the beginning of June. Nobody has even guessed about retail availiability.

enumae said...

TheKhalif
Intel is going after AMDs wallet but they seem to getting larger YoY drops on all indicators so they are taking money out of their own wallets too

Very true.

This could extremely backfire if you do have a 40% improvement over C2Q and AMD drops Barcelona at the original dual core Opteron prices. That will wedge C2 in between K8 and K10 in price and perf.

Thats not all it would take to have this backfire.

1. If a private equity came in and helped AMD.
2. If K10 is also able to have an advantage over Intel's 45nm, either on power or performance.

And with Barcelna ready for PCIe, HT and HTX Torrenza products they will be the darling of the server world. 1TFLOP will get a lot of wins in HPC and WebFarms.

The thing to watch, in my opinion, is whether or not they have volume before Intel does at 45nm. I read (I believe at the Inq) that Intel is planning a Q4 launch for 45nm Xeon's, no Desktop or Mobile until Q1 2008.

Isn't that abuse of its monopoly?

It could be, but at the same time AMD lowered it's prices first, and according to Scientias link they will do so again on April 9th. Thats, I believe, 2 or 3 times already this year, and possibly 4 or 5 times since the launch of the Core Microarchitecture.

enumae said...

Scientia
If this is true it is a surprise because obviously there won't be any new K10 dual cores in April, not until Q3.

Thats what there road map says, or at least this one.

Also, I don't know if AMD could release a 6400+ which would have to be clocked to 3.2Ghz. Without a new higher clocked chip this would certainly be a huge reduction in desktop prices. If AMD does not release a 6400+ this could make for a pretty bad second quarter in terms of revenue.

Well, I read this, and if true would support your thoughts.

As far as Q2 revenue, well we need to see Q1 results and AMD's guidence for Q2. If the rumors of an inventory build up are true, Intel may very well be winning back market share.

Scientia from AMDZone said...

enumae

Yes, the fudzilla piece is saying nothing faster than 3.0Ghz for AMD. So, cutting prices for desktop in April and then Kuma in Q3. AMD would need the 2.5Ghz model to match 6000+ but if they can release the 2.7Ghz version they will have an upgrade. Intel would probably still be fine with 3.0Ghz at that point. The 2.9Ghz version may not be released until later.

Still, that would be about 3 months with reduced prices for AMD. Surely this will hit their income in Q2. I'm guessing the price drops are to avoid losing volume share.

Jeff said...

abinstein
Why would single chips clock "significantly" higher than two in an MCM? It sounds like a single-socket server could clock much higher than a dual-socket one. Does it make sense?


This has already been addressed earlier in the thread. The main issue is heat. Twice the cores makes for twice the heat, which means parts can't clock as high.


Hmmm, would there also be increased signal noise for the Intel platform since both chips go through the same FSB?

abinstein said...

jeff
"Twice the cores makes for twice the heat, which means parts can't clock as high."

You assum that if Intel raises dual core TDP it could unconditionally make clock rate higher. This assumption unfortunately is false. Power is but one of the many barriers of clock speed. The problem could be clock skew, or some signal propagation delay, or some transistor on the critical path that couldn't be made larger. In all these cases simply increasing voltage/power to the die won't help clock rate at all.


"Hmmm, would there also be increased signal noise for the Intel platform since both chips go through the same FSB?"

The simplest way to compensate large fanout/fain is to increase signal strength, i.e., increase power. This is probably the most straightforward case where the good power-freq tradeoff exists.

Jeff said...

"You assum that if Intel raises dual core TDP it could unconditionally make clock rate higher."

How the heck did you get that out of what I said? Two cores put out twice the amount of heat as one core. Therefore you need to clock quad cores lower to stay in the same power consumption bracket. If your top of the line dual core processor eats 125 watts, then you aren't going to make it into a quad core MCM that sucks 250 watts... it would need unpractical monster cooling.

Ho Ho said...

jeff
"The problem could be clock skew, or some signal propagation delay, or some transistor on the critical path that couldn't be made larger"

Considering we have seen quadcores clocked at 5GHz and dualcores at 5.4GHz I don't think this would be a problem. Those things you listed are not resolved by better cooling. Some not-so-stable OC records here.

Scientia from AMDZone said...

jeff
Hmmm, would there also be increased signal noise for the Intel platform since both chips go through the same FSB?

This is true but this just limits the FSB speed, not the main cpu clock speed. For example, if DDR2-1066 is released Intel will not be able to take full advantage without significant improvement in FSB speed. Intel is currently struggling to hit 1600Mhz which is a speed that AMD has in equivalence since revision F last year. These two are not exactly the same because AMD's memory bus is twice as wide as Intel's FSB. Therefore, AMD is only clocking half as high to get the same bandwidth.


Someone posting anonymously on sharikou180's board asked why if AMD could do MCM with graphics that Intel couldn't continue to do MCM after they adopt IMC and CSI in 2009. The answer to that is pretty straightforward. Intel could do this but the increase from the second die would probably only be about 40% based on this configuration as used by Apple on their dual Macs and dual socket AMD systems where only one was connected to memory.

abinstein said...

jeff: "If your top of the line dual core processor eats 125 watts, then you aren't going to make it into a quad core MCM that sucks 250 watts... it would need unpractical monster cooling."


I don't think you understand what I said. Intel could release a quad core at 120W. That is about two dual core at 65W MCM'd together (some 10W saving for only one interface to the FSB and external pads).

When you said Intel "can release duals one or maybe even two speed grades above" quads, the assumption is clear, that, with higher TDP (than 65W) you get faster dual core. What I said was this is not entirely true. It is probably true untill 80W, where Conroe XE is operating at. Passing that, it is very possible that the clock rate of Conroe is not limited by power (basically switching and leakage current) but something else on die, such as clock skews and a few other things that I mentioned.

The point is that 3GHz QC MCM doesn't mean 3.2GHz DC at all, and Scientia might be correct to say that there's no faster DC on Intel's roadmapa.

Jeff said...

abinstein
The problem with your hypothesis (and Hoho has already pointed this out) is that we've already seen Core 2's overclocked beyond 5GHz. There is no evidence that there is an architectural hindrance to obtaining higher than 3GHz clocks. Not to mention lots of manufacturers sell factory overclocked versions of Core 2's well above 3GHz. In this case, power draw is most definitely the limiting factor to attaining high clock speeds.

abinstein said...

jeff:"The problem with your hypothesis (and Hoho has already pointed this out) is that we've already seen Core 2's overclocked beyond 5GHz."


How many 5GHz Conroe do you see out of the millions that's sold? One? Two? Twenty? How many percentage of Conroe sold can be stably OC'd to 3.4GHz or above? Scientia made the good point which both you and ho ho did not want to listen: overclockability doesn't mean higher releasable clock speed.

Plus, most today's apps run faster on DC @3.4GHz than on MCM QC @3.0GHz. Intel will be more profitable with the former if it could do so, i.e., if the clock speed limitation was just power consumption.

abinstein said...

Ho Ho: "Considering we have seen quadcores clocked at 5GHz and dualcores at 5.4GHz I don't think this would be a problem."


If someone tells you that he can't get his Conroe above 3.2GHz, what would you say? He has bad OC skill, or the fact that the Conroe he bought was not supposed to run that high?

The problem of OC is, as scientia said, you need to do it under controlled environment to get good results. Good MB and memory are probably necessary; but most importantly, good luck in getting a good processor.

Jeff said...

You *aren't* listening. Overclocked C2D's don't prove that Intel can release faster chips, but they do prove that there won't be an architecturally imposed frequency wall in the near future. This means that thermals are the limiting factor in the here and now. Because Intel will release 3.0GHz quads it means that they have the ability to launch 3GHz duals at half the power consumption of those quads, which means that those chips should be able to clock a speed grade or two higher (because of the lower power consumption) than the 3GHz quad. Saying that there might be some other barrier is pure speculation, and *bad* speculation at that. The overclocked C2Ds (and *especially* the factory overclocked C2Ds from the gaming companies) are pretty solid evidence that there isn't some magical monkey wrench thrown into the gears at clocks higher than 3GHz.

Ho Ho said...

abinstein
"If someone tells you that he can't get his Conroe above 3.2GHz, what would you say?"

Around 80-90% of the cases motherboard or memory is the limiting factor, not CPU.

abinstein
"The problem of OC is, as scientia said, you need to do it under controlled environment to get good results"

When other parts are not slowing down OC'ing, ~3GHz clock speed is the minimum for even low-end Conroes that use inbox coolers and it often doesn't even need increasing CPU voltages.

In one Estonian HW forum I've seen Conroes OC'd by beginners without much problems at roughly those frequencies (stable for 24/7 use):
e6300 2.8-3.3
e6400 3-3.5
e6600 3.4-3.6

Lower end is usually reached without increasing voltages, higher end is usually around 1.4-1.5V and uusally with better aircooling.

With professionals those frequencies are around 100-300MHz higher, watercooling adds another 100-200MHz. I'm not counting the people who have bad motherboard that doesn't allow high FSB.

There haven't been enough e6700, ex6800 and quadcore CPUs to make good enough statistics about them.

abinstein said...

jeff:"Overclocked C2D's don't prove that Intel can release faster chips, but they do prove that there won't be an architecturally imposed frequency wall in the near future.


This is wrong. Core 2 inherits from P-M which is a microarch designed to minimize power consumption with something - anything - else limiting the clock speed. This is why it is so power-efficient. This also means that when you're lucky, you get a chip where those "something else" perform better than expected, and as a result you can get higher clock speed with more power. But that's when you're lucky.


Because Intel will release 3.0GHz quads it means that they have the ability to launch 3GHz duals at half the power consumption of those quads


This is true.


which means that those chips should be able to clock a speed grade or two higher (because of the lower power consumption) than the 3GHz quad."


This is bullshit. You are not comprehending some most basic ideas in circuit design. You can't always get higher clock speed with more power (or better cooling). Every circuit/process has an optimal operating point in terms of frequency versus power, and there is no reason (for you or anyone) to assume the point for C2D is higher than 80W. Note that Yonah was designed to operate optimally around 40-50W. If we count the double transistors in Conroe, it's straightforward to assume its optimal power is around 80W, which is where XE is released at.

Now, that doesn't mean you won't be lucky to get say 30% chips running 70% faster. However, this doesn't mean you can release those 30% chips as two-speed grades up. First, can you possibly predict their reliability at any higher clock speed? Second, can you possibly predict their power consumption at any higher clock speed? If you look at the freq-power graph of chip production you'll see that past certain power threshold the freq plots diverge, which means after that point (which can very well be 80-90W for C2D) you have hard time predicting the chip performance. Now, unless Intel can test every processor as thoroughly as an overclocker, it simply has no way to release high speed grades at this high power range.

Jeff said...

"there is no reason (for you or anyone) to assume the point for C2D is higher than 80W."

There is, and I fail to see how you can't grasp this *very* simple concept. Overclocked C2D's are running at above 80W power consumption, and running well at those levels. To speculate that 80-90W is the maximum optimal operating point is bad enough (you
're shooting in the dark), but to still keep that opinion in light of all evidence to the contrary is simply ignorant.

The fact that gateway offers 3.2GHz factory overclocked *quad cores* in their FX 530 systems is pretty good evidence that at least 3.2GHz dual cores should be possible from Intel.

http://www.gateway.com/programs/fx530/index.php?page=techspecs

abinstein said...

jeff:"To speculate that 80-90W is the maximum optimal operating point is bad enough (you
're shooting in the dark), but to still keep that opinion in light of all evidence to the contrary is simply ignorant."



You're just like so many of those who misquote and start name call when they have no good argument. I never said 80-90W "maximum" optimal operating point. I never said you can't get higher clock speed from Core 2 with more power. Read what I said in full before you BS. If you can't read, don't even respond.


"The fact that gateway offers 3.2GHz factory overclocked *quad cores* in their FX 530 systems"

I assure you that Gateway tests every system/chip at the said clock like an overclcker would before selling it; I also assure you that Gateway doesn't get much of these out of the batch it receives from Intel (just compare the price). It won't be economical for Intel to do the same.

For some reason you have never looked at the problems Intel faces from the point of view of a chip manufacturer, but always from the point of view of an enthusiast.

Just go back read my comments and by the way get your basic chip design knowledge straight.

Jeff said...

"I never said you can't get higher clock speed from Core 2 with more power."

Your were either saying that or that there was going to be some other monkey wrench in the architecture or platform at speeds over 3GHz. Whatever your trying to say it's nonsense.

"I assure you that Gateway tests every system/chip at the said clock like an overclcker would before selling it;"

Definitely

"I also assure you that Gateway doesn't get much of these out of the batch it receives from Intel (just compare the price). It won't be economical for Intel to do the same."

Aha! This time I caught you and you aren't getting away so easily. A Quick look on gateway's site shows that there are no preconfigured models with the QX6700 not overclocked. The only way to get the stock QX6700 is to configure it yourself, and even then, If you look further you notice that the price difference between the stock and factory overclocked version is quite minimal ($989 vs. $1089). Given this data, it's pretty obvious that gateway is getting their QX6700's to hit 3.2GHz with *ease* and they are most definitely selling more factory overclocked QX6700's than stock.

Heh, I win.

abinstein said...

jeff:"Your were either saying that or that there was going to be some other monkey wrench in the architecture or platform at speeds over 3GHz."

If this is really what you think then you have completely no reading skill, at least not enough for me to consider rational discussion.

Go back and read properly.


"A Quick look on gateway's site shows that there are no preconfigured models with the QX6700 not overclocked."

A $100 price difference just for an OC test is not small. Apparently you're still not getting the point.

To make sure all these chips OC well, Gateway must test each of the system with a higher default clock speed. In return it gets a few systems that can be sold higher. You can't compare the $100 with the street price of boxed C2Q, because Gateway does not make $900 from selling a processor, but more like $300 for a $3000 system. Lets say the OC test takes 1/10th effort of the whole assembly, which includes logistics, mechanics, software installation, testing, and storage, etc. A $100 higher margin (33% of that of the whole system) means that the success rate is roughly 1/3.

These are just first-order estimation, but you can clearly see the result is nothing great. Remember that the reason that Gateway can do this easily is because it is assembly and selling the whole systems anyway. Intel is facing a completely different problem here, and not even 80% overclockability could justify two speed grades up, let alone 1/3.

Ho Ho said...

abinstein
"You can't always get higher clock speed with more power (or better cooling)."

Tell me about one CPU architecture where this is not the case. Just one. Bonus points if it is made using bulk silicon like Intel ones.


"Now, unless Intel can test every processor as thoroughly as an overclocker, it simply has no way to release high speed grades at this high power range. "

Intel does test its CPUs. It doesn't divide them into different speed bins randomly. They have special machines that do it. They don't assemble full PCs and run benchmarks on them. They just stick a bunch of CPUs to some kind of an oven and run some signals through the CPUs to see if any of them fails some tests.


"A $100 price difference just for an OC test is not small."

$100 for a CPU that is two speedbumps faster is not that much. Or did you really think they would OC the CPU and not ask more for it than for the stock one? That $100 is definitely not only the cost of changing FSB in BIOS and executing some batch script to run a few benchmarks.

Jeff said...

"If this is really what you think then you have completely no reading skill, at least not enough for me to consider rational discussion."

I've reread your posts. If you are saying something that I'm not understanding, it's probably because of sloppy writing.

"A $100 price difference just for an OC test is not small. Apparently you're still not getting the point."

100 Dollars for an over 500MHz *professionally* done overclock on a top end part that costs $1000 dollars anyway *is* small. Don't kid yourself.

"To make sure all these chips OC well, Gateway must test each of the system with a higher default clock speed. In return it gets a few systems that can be sold higher."

No, the *vast* majority of the quad core systems are sold higher. It's very obvious because there aren't any preconfigured quad core boxes that *aren't* overclocked. My God man, you are trying my patience.

"You can't compare the $100 with the street price of boxed C2Q, because Gateway does not make $900 from selling a processor, but more like $300 for a $3000 system."

A good part of that $100 obviously goes towards a better than average stock cooling system. At 3.2GHz those quads are going to dissipate insane amounts of heat.

"Lets say the OC test takes 1/10th effort of the whole assembly"

There you go pulling numbers out of your arse again.

"A $100 higher margin (33% of that of the whole system) means that the success rate is roughly 1/3"

Success rate of *what*? What are you even talking about?! Remember what I was saying about sloppy writing?

"Remember that the reason that Gateway can do this easily is because it is assembly and selling the whole systems anyway."

Of course. I'm not arguing that Intel can rebag current 2.66GHz quad cores and sell them as 3.2GHz models, I'm merely showcasing how heat (and cooling) is the limiting factor with the C2's at the moment (just to recap, because with you I probably need to, it's because of the very high success rate that gateway has overclocking an already high dissipation part with better cooling). This in turn supports my claim, which *should* be obvious, that if Intel can release a 3.0GHz quad core, they should be able to release a >3.0GHz dual core part at around the same thermal envelope.

Jeff said...

Hoho

"Tell me about one CPU architecture where this is not the case. Just one. Bonus points if it is made using bulk silicon like Intel ones."

Coppermine P3 at over 1GHz. Still, the exception to the rule.

"That $100 is definitely not only the cost of changing FSB in BIOS and executing some batch script to run a few benchmarks."

Actually, the Qx6700 has an unlocked multiplier.

Aguia said...

I'm sure that I have seen some article stating that Intel was not going to release faster dual core processors.
At least not until the quad core parts catch up the dual core in clock speed.
The problem seemed that they didn’t want the dual core processor beat the quad core in performance (most of the real tests).

AMD as done the same with the single core VS the dual core.
Fastest single core: 2.4Ghz (4000+).
Fastest dual core: 3.0Ghz (6000+).

But that doesn’t remove the Scientia point, Intel in the past could have done it but didn’t do it and it was losing to AMD.

Too bad I couldn’t find the statement/article.

But this link help in some points:
http://www.tgdaily.com/content/view/30741/135/
http://www.tgdaily.com/content/view/30672/113/
http://www.tgdaily.com/content/view/28121/

Jeff said...

"AMD as done the same with the single core VS the dual core.
Fastest single core: 2.4Ghz (4000+).
Fastest dual core: 3.0Ghz (6000+)."

FX-59 - 3GHz single core.. because I feel like busting some chops today.

Ho Ho said...

jeff
"Coppermine P3 at over 1GHz"
http://www.ripping.org/database.php?act=records

Highest overall clockspeed I saw there was 1.62GHz, ~90% increase from 0.85 GHz. It was achieved with LN2. There was also a 0.6GHz CPU OC'd won air to ~1.3GHz, ~115% OC. There are some Coppermine based Celerons there also, one of them was OC'd to 1779.75MHz.

So where exactly is the architectural limit for those CPU's that cannot be crossed?


"FX-59 - 3GHz single core.."

Where could I get one? All I saw was some rumours from 2005 but not the real thing. Perhaps you are thinking some OC'd CPU sold by some retailer, similar to Gateway and 3.2GHz quadcores? Also, didn't FX60 come availiable soon after FX57 replacing the singlecore FX CPUs?

Jeff said...

"Also, didn't FX60 come availiable soon after FX57 replacing the singlecore FX CPUs?"

Hmmm, I think you may be right. In that case, highest single core FX-57, 2.8GHz.

"So where exactly is the architectural limit for those CPU's that cannot be crossed?"

Read this letter from Kyle Bennett to Thomas Pabst and then get back to me.

http://www.tomshardware.com/2000/08/01/revisiting_intel/page2.html

ashenman said...

Jeff, although I do not completely agree with all of abinstein's posts, it does seem to me like you're being intentionally dense.

Let me lay it out like this. In the process of making a processor core, you more often than not, have some very small deformities in the image that was lithographed onto the die. Often, this causes no problem, and the processor only has to run at a reduced clockspeed to remain stable at completely stock voltages, without a faster fsb, and without enthusiast hardware to back it up.

The point is, perhaps Intel simply knows exactly where to sell its processors. Anything that easily makes the necessary clockspeeds is sold to the channel, where most enthusiasts buy. Anything that, under the conditions most horrible power supplies, motherboards, and ram, ends up just barely making its speed grade, gets sold to Dell, Gateway, and everyone else.

The logic behind this, why waste good parts on a customer who wont notice or care. This will then inflate the perception of the overall clockability of the architecture and give Intel some good PR, while making sure it's easier for everyone to get the product they want (so it's a good thing overall, and I'm glad Intel is doing it).

I realize ho ho made the point that Intel doesn't hand test each processor, because it doesn't have to. But, they do throw various forms of errata at the processor at various clockspeeds and see exactly how well it can handle it. If it can't handle it at all, or handle it poorly, it's to the junk bin or a lower bin respectively.

The architecture comes to play in all of this in terms of how well it can deal with higher amounts of errata.

Also, the fx 60 came in a few months later than the x2s.

hoho, the coppermine p3s that could overclock were very, very few, and very far between.

abinstein said...

jeff:"I've reread your posts. If you are saying something that I'm not understanding, it's probably because of sloppy writing."

jeff... you were misquoting me literally, at which point it doesn't matter how the writing is. So save your name calls please. You'd know what I said is true if you had ever designed an IC, run it through the fab, and test how fast/well the chips run when they get back.


"100 Dollars for an over 500MHz *professionally* done overclock on a top end part that costs $1000 dollars anyway *is* small."

You can pay $25 to ask a guy at CircuitCity to configure BIOS for you (more than what Gateway needs to do for the "factory overclock").


"No, the *vast* majority of the quad core systems are sold higher. It's very obvious because there aren't any preconfigured quad core boxes that *aren't* overclocked. My God man, you are trying my patience."

And you really believe the vast majority of people who buy a QC won't bother to customize?

A man with bad logic must be very patient to find the right way.


"Success rate of *what*? What are you even talking about?! Remember what I was saying about sloppy writing?"

Of course it's success rate of overclocking, what else? There's this thing called "context" that even an AI program nowadays can grasp.

I've seen too many of your type, who claim the text book is badly written while they simply don't have the capability to read and comprehend.


"I'm merely showcasing how heat (and cooling) is the limiting factor with the C2's at the moment."


The fact that some chips can run faster with better cooling doesn't make heat the limiting factor. I have been saying this from the beginning but your simply don't get it. C2D at 2.66GHz is 65W and 3GHz is 80W (~1.2x); this means 3.4GHz, if the circuits/process output were stable at that point, should be well within 115W (~1.44x), which is not limiting at all.

But as ho ho said, Intel doesn't test chips like an overclocker; it tests them with automated machines in several phases, monitoring electrical properties, timing, and functional correctness. These tests are never comprehensive, but a selected subset that (hopefully) reflect the full system performance.

The fact that you can overclock 33% or even 80% of chips doesn't mean this subset of tests can reliably pick up those overclockable chips. Neither does it mean these chips can run within a bounded power range. If one 3.4GHz chip takes 100W and another 150W, you have no releasable speed grade.


OTOH, I do agree with aguia's view that there's probably a mind-change of Intel that it is focusing on more cores instead of faster clocks. Still, since most QC chips are sold to enthusiasts who knows performance more than a single (# cores or MHz) value, I see no reason for Intel not to make 2x+ money from good C2D 3.4GHz if it can.

Scientia from AMDZone said...

Yes, it was true that Intel released an unstable chip with the Coppermine 1.13Ghz PIII. This chip was actually beyond the limits and had to be underclocked to 1.0Ghz. It took Intel six months to release a version that was stable at 1.13Ghz.

However, AMD also hit the limit with the Thunderbird 1.4Ghz K7 which ran hot. Neither of these chips was capable of overclocking.

During this period of time, 2000 - 2003, chips were typically released at speeds 100-200Mhz below the overclock on air. However, since late 2004 I think Intel has been 300-400Mhz. I think AMD is still holding within 200Mhz though.

abinstein said...

scientia:"Yes, it was true that Intel released an unstable chip with the Coppermine 1.13Ghz PIII. This chip was actually beyond the limits and had to be underclocked to 1.0Ghz. It took Intel six months to release a version that was stable at 1.13Ghz."

Actually, had Intel released those Coppermine chips at 1.0Ghz, they would've had good overclockability to 1.13Ghz.

If 80% of the 1Ghz chips can be overclocked to 1.13Ghz, anyone would be temped to ask "why not release them at a speed grade or two higher?" However, if 20% of the 1.13Ghz chips are not stable, everyone is pissed off. The issue here is not whether some chips can run faster, but whether those chips make a releasable speed grade: 1) can they be reliably determined, 2) can their power consumption be well estimated.

IMO AMD has better control on the clock speed of their processors, probably due to the K8 design, the SOI process, or APM. Historically AMD has to do so due to its limited capacity. Intel, OTOH, has more advanced lithography and higher capacity, and the P-M line was simply not designed to run fast (in terms of clock speed) but efficient (in terms of performance).

Scientia from AMDZone said...

abinstein
Actually, had Intel released those Coppermine chips at 1.0Ghz, they would've had good overclockability to 1.13Ghz.

Not really. Intel rushed these chips into production and they had so many errata that a BIOS patch was required to keep them from crashing. The patch code knocked the performance down by about 11%. This was not Intel's typical develop and release pattern; this was Intel desperate to pass AMD and lauching a chip before it was ready.

Intel, OTOH, has more advanced lithography

Intel does not have more advanced lithography. Intel's current 65nm lithography is basically the same as AMD's. However, on 45nm, Intel's lithography will actually be worse than AMD's since Intel won't use immersion. We will have to see if this causes Intel any problems. I imagine 32nm will be pretty much even again.

Ho Ho said...

Have there been any concrete and accurate information about AMD 45nm and immersion litography? Last I heard about it it was IBM who was talking about it, AMD was talking about in 32nm context. If there have been any news about 45nm I'd be glad to see some links.

Roborat, Ph. D. said...

Scientia said:
However, on 45nm, Intel's lithography will actually be worse than AMD's since Intel won't use immersion. We will have to see if this causes Intel any problems. I imagine 32nm will be pretty much even again.


you're making false claims again. how is Intel's litho process much worst when Intel get to 45nm without purchasing tens of $3M stepper equipments? compared to AMD who needs new tool sets just to jump into the next node, which btw is the Fab constraining tools. At the end of the day it boils down to cost per wafer and since it is only Intel who could shrink a process without additional capacity expenditure, i say it is them who has the advance process.

Jeff said...

"Of course it's success rate of overclocking, what else? "

That's what I feared, but I hoped you meant something else. Do you realize that you just made some numbers up off the top of your head, said "therefore Gateway gets a 33% higher margin" and THEN said "therefore Gateway has a 33% overclocking success rate." -- These two things are *completely* unrelated.

I hardly need to point out how horrible your logic is though. I'm done talking to you, because at this point it's pretty obvious you're a lost cause.

"A man with bad logic must be very patient to find the right way."

Heh, that's pretty ironic coming from *you*.

Scientia from AMDZone said...

ho ho
Last I heard about it it was IBM who was talking about it, AMD was talking about in 32nm context. If there have been any news about 45nm I'd be glad to see some links.

I could see how you could be sceptical if you've read things like the first link since it mentions production partners only in general. However, the rest of the links should make things clear.

IBM to roll out 45-nm immersion process by end of year

IBM and its growing list of silicon manufacturing partners will begin rolling out immersion lithography for 45-nanometer processes in Q4

AMD, for one, will remain toe-to-toe with Intel on the Moore’s Law road map for x86 processors. In addition, IBM partners Freescale, Toshiba, Sony, Infineon and Samsung will remain on the cutting edge of the road map for a variety of other semiconductors. And IBM manufacturing partners Samsung and Chartered Semiconductor will remain on the forefront of manufacturing processes at the most advanced and increasingly expensive nodes.


AMD, IBM Immersion

IBM and AMD today presented papers at IEDM describing the use of immersion lithography, ultra-low-K interconnect dielectrics, and multiple enhanced transistor strain techniques for application to the 45nm microprocessor process generation.

AMD and IBM said they expect the first 45nm products using immersion lithography and ultra-low-k interconnect dielectrics to be available in mid-2008.


AMD Describes Road to 45-nm Processors

AMD's 45-nm strategy is based on three fundamental techniques, AMD and IBM executives said Monday night: the use of immersion lithography, which uses a lens of purified water to help manufacture the components; an "ultra" low-k dielectric, which lowers the capacitance of the chip, allowing lower power consumption; and an improved version of "strained silicon,"

LITHOGRAPHY: AMD preps to take immersion plunge at 45 nm

Unlike AMD, Intel plans to make 45-nm devices by using conventional, 193-nm "dry" lithography scanners instead of immersion tools.

But at 45 nm, AMD will take the plunge into immersion scanners. The company will use ASML's TwinScan XT:1700Fi, a 193-nm immer- sion tool with a numerical aperture of 1.2. That scanner will boost the depth of focus and provide a 40 percent gain in resolution, said Nick Kepler, vice president of logic technology development at AMD.

abinstein said...

jeff:"said "therefore Gateway gets a 33% higher margin" and THEN said "therefore Gateway has a 33% overclocking success rate." -- These two things are *completely* unrelated."

You simply don't understand, dude. The 1/3 success rate comes from this: 1.1 <= 1.33*x + (1-x) = 1+0.33x, thus x ~= 1/3.

As I said, if you don't understand, you should just shut up.

ashenman said...

roborat, can you say, "run-on"?

As scientia pointed out, 45nm will use immersion litho, so most of your points are moot, however...

For someone who claims to know so much about processes, you have the inexplicable ability to tie factory and industrial management into how well a transistor technology runs at a specific size. I realize yields are also part of this, but factory management has little to do with those (though if your management is retarded, you'll end up with lower yields due to environmental problems).

enumae said...

Scientia

Off topic...

AMD has a slide showing Barcelona 42% faster than Intels 5355 using Spec FP Rate 2006.

When looking at the 2000 results compared to the 2006 results, it would seem to be almost 50% reduction in FP Rate.

My questions is this, if I apply that 50% reduction to Barcelonas score, is that a way to have a decent idea of the projected performance in 2006 when comparing Intel and AMD?

Here is a link to what I have done, if incorrect please explain.

Thanks in advance if you can help.

enumae said...

Sorry the original slide is using SpecFP_Rate 2000.

Jeff said...

abinstein

I don't care if the (uncommented) numbers work out, because you're still comparing apples and oranges. You can't get gateway's OC success rate through margins, no matter how hard you try. You're stupid if you think you can.

You can however, look at their line up to see that

1. The only preconfigured quad core systems they sell are factory overclocked to 3.2GHz.

2. The price difference is very small for an extra 500MHz and better cooling. The vast majority of people who configure a system with a quad core CPU are going to spend the extra money to get the factory overclocked version. You might say that anyone who get's a $1000 CPU is going to overclock anyway, but you would be wrong. The people who overclock are the ones who build their own rigs.

So, it's very obvious that Gateway is selling more factory overclocked than stock quad cores. The way gateway has their quad cores set up, either:

a. They are achieving overclocks on nearly all of their chips.

b. They aren't and they have a huge stockpile of QX6700's collecting dust in a warehouse.

It's obvious to anyone with a hint of intelligence what's happening.

Scientia from AMDZone said...

roborat

Don't you get tired of having double standards for AMD and Intel? When Intel moved to 300mm first I'm sure you didn't claim that Intel was behind AMD in production because Intel had to move to 300mm while AMD was able to get more mileage out of its 200mm FAB. No. I'm sure you felt that Intel was ahead of AMD because Intel switched to 300mm first while AMD followed later. We know that Intel will follow AMD to immersion lithography at 32nm.

The truth is that back in 2004 ASML was going to release a new immersion scanner called the Twinscan 1250. This was a new technology so it wasn't that attractive. However, IBM and AMD dove in with both feet and got a pre-production Twinscan 1200i istalled at the Albany test center. They've now had three years to wring the rough edges out of this process. This is why IBM/AMD states defect density equal to dry lithography while other companies are still reporting defect density 10X higher than dry. Sometimes hard work pays off.

In a practical sense there is one crucial difference between what Intel is going to do and AMD is going to do. Intel has to use double masking to make the gate layer which means scanning twice. AMD doesn't need double masking with immersion. This means that Intel's double masking effectively cancels out AMD's extra metal layer.

Sal said...

OOOOOPps scientia. Intel JUST announced that 45nm is on track for 2H07, and Nehalem is a mid-08 chip.

Are they lying? Are you correct?

Of course you know better when they will release their products, rather than themself.

Comment?

Jeff said...

Abinstien

Look what I found in regards to Penryn:

"Dynamic Acceleration Tech —
Penryn will also play with power by introducing a novel dynamic clock speed scaling ability. When one CPU core is busy while the other is idle, thus not requiring much power or producing much heat, Penryn will take advantage. The chip will boost the clock speed of the busy core to a higher-than-stock frequency—while staying within its established thermal envelope."

Fancy that, the cores can attain higher clock speeds when there are less of them producing heat. Never saw that coming, no sir!

In all fairness, your point did make sense theoretically, but all evidence we've seen so far points otherwise. This pretty much clenches it though.

Woof Woof said...

enumae, I think it is pointless to keep looking at Spec2000 scores. Here's what SPEC guys wrote:

http://www.spec.org/cpu2006/Docs/readme1st.html#Q17

"Run-time:
As of summer, 2006, many of the CPU2000 benchmarks are finishing in less than a minute on leading-edge processors/systems. Small changes or fluctuations in system state or measurement conditions can therefore have significant impacts on the percentage of observed run time. SPEC chose to make run times for CPU2006 benchmarks longer to take into account future performance and prevent this from being an issue for the lifetime of the suites.

Application size:
As applications grow in complexity and size, CPU2000 becomes less representative of what runs on current systems. For CPU2006, SPEC included some programs with both larger resource requirements and more complex source code.

Application type:
SPEC felt that there were additional application areas that should be included in CPU2006 to increase variety and representation within the suites. For example, video compression and speech recognition have been added, and molecular biology has been significantly expanded.

Moving target:
CPU2000 has been available for six years and much improvement in hardware and software has occurred during this time. Benchmarks need to evolve to keep pace with improvements."

The increase in application and data size and complexity is important. As many have stated, in real world applications with larger data sets that overwhelm the Woodcrest 4MB L2 cache, the performance gains are not as stellar as a benchmark like SuperPi or other synthetic benchmarks.

enumae said...

Woof Woof
enumae, I think it is pointless to keep looking at Spec2000 scores.

Thats why I am trying to figure out (roughly) how it would compare to SPECfp_rate2006.

abinstein said...

jeff, I don't want to further discuss with you why I could estimate gateway's OC success rate because that would mean I have to start teaching some economics and industry engineering. Suffice to say this kind of estimations is what people do everyday.

However, regarding your comment:
"Fancy that, the cores can attain higher clock speeds when there are less of them producing heat. Never saw that coming, no sir!"

I have to tell you that this is something we knew quite long ago. There have been papers and talks from Intel lab on this a few years back. IIRC it's code named "Foxton." Basically for single-threaded mode, one fast core is used; for multiple-threade mode, a few slow cores in used. The main point is you don't gain performance with this technique; instead you get better power efficiency for single-threaded codes on multi-core. Also, it can be done via software, though most likely some hardware is added to make it more efficient.

It proves nothing of penryn's "core revamp".

Jeff said...

abinstein

"Suffice to say this kind of estimations is what people do everyday."

yes, but the people who get paid to do that are able to make estimates a *lot* better than you are. And those people don't spit in the face of the obvious in an attempt to prove a point, like some frenzied fanboy on the internet.

First off, you assume too much. You assume you know what the margins are on Gateway's flagship models, you assume that the extra hundred dollars is pure profit, you assume how much effort goes into overclocking each system, etc.

Secondly, the proof that your estimate is *way* off is easy to find. The way gateway has set up their quad core systems, they're going to be selling a lot more factory overclocked than stock qx6700's. The only way your 'estimate' is right is if gateway is sitting on a bunch of $1000 qx6700's, and they most definitely *aren't*. The only way for you to win this argument is to somehow show that Gateway is selling more stock qx6700's than factory overclocked ones... and good luck with that!

All in all, your senseless rationalizing betrays the logic of an extreme AMD fanboy. This is coming from a mild AMD fanboy, just to let you know.

"Basically for single-threaded mode, one fast core is used; for multiple-threade mode, a few slow cores in used."

Right, because you can clock the single core C2D faster when there's less heat to deal with. That's kind of my point.

"The main point is you don't gain performance with this technique;"

Higher clock frequency for single threaded apps = higher performance for single threaded apps. As with everything else I've said, the concept is very simple.

Scientia from AMDZone said...

Barcelona in China. This should hasten the retirement of SpecFP_rate2000. AMD's 50% performance improvement over 2.66Ghz Clovertown would require a whopping 4.0Ghz Clovertown to match. It's probably safe to assume that the difference won't be so great on SpecFP_rate2006.

Scientia from AMDZone said...

Sal
OOOOOPps scientia. Intel JUST announced that 45nm is on track for 2H07,

Yes, Penryn taped out at the end of November 2006 so Intel might be able to bump this up to beginning of November 2007. I've never seen anywhere that Intel said the beginning of the second half.

and Nehalem is a mid-08 chip.

You'll have to post a link to this. For example the latest INQ gossip in Nehalem bits bubble up is that Nehalem is: on track for a late 2008 launch.

However, the IMC version would be on socket B and is dependent on Tukwila which will be launched first.

BTW, all of the information I have seen says that Intel will not release an IMC for desktop chips except perhaps the EE/X chips. In other words, the single socket version of Nehalem still uses an external northbridge. I suppose the single socket version could be launched first but I was referring to the version with IMC and CSI on socket B.

Scientia from AMDZone said...

Sal
OOOOOPps scientia. Intel JUST announced that 45nm is on track for 2H07, and Nehalem is a mid-08 chip.

Are they lying? Are you correct?

Of course you know better when they will release their products, rather than themself.

Comment?


I've done several google searches but haven't yet come up with an official Intel announcement like you are describing. Since you've obviously read such an official announcement from Intel please give the link so I can read it for myself. Comment pending.

Roborat, Ph. D. said...

Scientia from AMDZone said...

When Intel moved to 300mm first I'm sure you didn't claim that Intel was behind AMD in production because Intel had to move to 300mm while AMD was able to get more mileage out of its 200mm FAB. No. I'm sure you felt that Intel was ahead of AMD because Intel switched to 300mm first while AMD followed later. We know that Intel will follow AMD to immersion lithography at 32nm.


That example is absolutely incorrect. Some Fab changes are necessary while some have benefits.
The move to 300mm brings significant cost benefits derived from the massive throughput gains across all Fab process tools. The quicker you get there more cost competitive you are. On the other hand the move to immersion Litho is simply a technology enabler. It only ALLOWS you to jump a process node while achieving sensible yields. There is a significant cost associated with this new capability.
Now if Intel can jump a node without purchasing new tools that tells you a lot how advanced their process is compared to AMD/IBM’s SOI. Of course Intel will move to immersion technology at 32nm and that is when they will purchase the new tools, but I sure hope you have the common sense to realize that Intel will jump to 45nm while avoiding the cost of buying new stepper tools.

Roborat, Ph. D. said...

ashenman said...

As scientia pointed out, 45nm will use immersion litho, so most of your points are moot, however...

For someone who claims to know so much about processes, you have the inexplicable ability to tie factory and industrial management into how well a transistor technology runs at a specific size. I realize yields are also part of this, but factory management has little to do with those.


Moot? If you think finding the need to use immersion litho at 45nm an advantage then by all means feel free to wallow in your wisdom. Intel must really feel bad about the cost avoidance they just did with dry litho at 45nm.

If you’ve ever worked in the real world you’d realize that cost is ALWAYS the limiting resource. At the end of the day it’s not what AMD or Intel can put into a chip that defines what the end user sees. It’s what AMD and Intel can put in the chip in the most economically viable manner. Now if you’ve ever worked in a Fab you’d know a design will never get approved if it doesn’t meet the cost target. Yields, target market size, target price and cost per die have equal significance. Now if unit/wafer and cost per die is a gating factor in the design of a processor, can you really tell me that factory management has little to do with it?

Azary Omega said...

Scientia from AMDZone said...

Barcelona in China. This should hasten the retirement of SpecFP_rate2000. AMD's 50% performance improvement over 2.66Ghz Clovertown would require a whopping 4.0Ghz Clovertown to match


Actually i care more about how will it run my Dark Messiah game. To tell you the truth I'm getting tired of underperforming Core2Duo that i got under my overclocked 8800GTS.

~25fps at 1440x900 is simply to little for the price i payed (400$).

Ho Ho said...

scientia
"AMD's 50% performance improvement over 2.66Ghz Clovertown would require a whopping 4.0Ghz Clovertown to match"

Where exactly did that 50% number come from? 42% was for specfp_rate2000. Wasn't that benchmark bandwidth limited?

Does anyone have any idea what was the clockspeed of the AMD quadcore they compared there?

Also an interesting thing to see was how little difference there were between R580 and R600.

There wasn't actually much news on that link, mostly they are just showing their old slides.

azary omega
"To tell you the truth I'm getting tired of underperforming Core2Duo"

I take you haven't OC'd it enough or you just have a bad motherboard that doesn't allow it. What is your CPU, its clock speed and motherboard?

Azary Omega said...

Ho ho said...
I take you haven't OC'd it enough or you just have a bad motherboard that doesn't allow it. What is your CPU, its clock speed and motherboard?


I got e4300 at stock fqz on ASUS P5VD2-X.

You're right, i didn't OCed it. I don't have to, I'm an rich American, i can pay extra 800$ to intel so that they OC my CPU. Or maybe 200$ to some geek so he could take it even higher. I guess if i wasn't lazy i could even do it myself, after all, I've been in this industry from the times of Electronika 60.

Ho Ho said...

azary omega
"You're right, i didn't OCed it. I don't have to, I'm an rich American, i can pay extra 800$ to intel so that they OC my CPU"
vs
"my overclocked 8800GTS"

Interesting.

Anyways gettin 2.8Ghz out of e4300 shouldn't be too difficult. It requires only 311MHz FSB, I think even that Via thingy should be capable of it. From 266 to 311 isn't that big jump, even when you settle with the motherboards 266MHz FSB you'll still get it up to 2.4GHz, a whole 33% faster than at stock. Just make sure you increase FSB voltages, it might be needed to go >266MHz. CPU might start needing additional voltage at around 2.9-3GHz.

OC'ing isn't at all difficult, especially for someone like you who is supposed to be a professional

Sal said...

The interview with Intels Pat Gelsinger is the announcement. Which you can read on xbitlabs, anandtech, techreport, dailytech, even theinq and so on.

Do you recon that Pat is lying? I think not. I'll bet lots of money on his knowledge about those things, rather than yours. No offence

Greg said...

Nice job dodging scientia's point about the masking, roborat.

I'm having a hard time seeing how your last point had any relevance to mine. I was talking about how advanced the process is. You somehow go into a discussion of costs. To me, an advanced process technology yields very well, runs very well, and clocks very well. Is there something I missed here?

Azary Omega said...

ho ho said...
Anyways gettin 2.8Ghz out of e4300 shouldn't be too difficult. It requires only 311MHz FSB, I think even that Via thingy should be capable of it. From 266 to 311 isn't that big jump, even when you settle with the motherboards 266MHz FSB you'll still get it up to 2.4GHz, a whole 33% faster than at stock. Just make sure you increase FSB voltages, it might be needed to go >266MHz. CPU might start needing additional voltage at around 2.9-3GHz.

OC'ing isn't at all difficult, especially for someone like you who is supposed to be a professional


LOL. I was being sarcastic. By the way did you know that some people might not want their CPU being overclocked? Just because.

Oh and about that 'pro' statement by you, well, that 'Electronika 60' statement didn't tickle you so I'm guessing you weren't around back then. How old are you? 25ish?

abinstein said...

sal:"The interview with Intels Pat Gelsinger is the announcement."

If I'm not mistaken the announcement is that Penryn production will start by the end of this year. This would mean a 2008 release, as scientia said.

abinstein said...

jeff:"Right, because you can clock the single core C2D faster when there's less heat to deal with. That's kind of my point."

WRONG. It's because you can clock the other cores slower to stay in power envelop. Gosh I wish you had been to the Intel talks...

enumae said...

Scientia

We had previously talked about what percentage 2P servers held in the server space, and how it was read at The Inquirer that it was about 80%.

Well, I found an interesting bit of news that, while it does not validate, would make the claim all the more (figuratively) accurate.

"High-profit market
The market for servers with four or more x86 processors isn't nearly as large as the two-processor market, said IDC analyst Michelle Bailey, but there's a good reason to be in it.

"It's not a high-growth market, but it's a very profitable market," Bailey said. In 2006, 5 percent of x86 servers shipped had four or more processors, but those accounted for a disproportionately large $5.5 billion of the $25.8 billion in sales that year. The market grew slightly from $24.6 billion in 2005, and Bailey said it's expected to remain a constant fraction of the overall x86 spending through 2011."


Here is the link to the article in which it was stated.

So, while not validated, the discussion is somewhat resolved and the claim of 80% 2P maybe fairly accurate.

abinstein said...

jeff:"The only way your 'estimate' is right is if gateway is sitting on a bunch of $1000 qx6700's, and they most definitely *aren't*."

It's true that I estimated the OC success rate numbers from hypothetical numbers. The only way my estimate is wrong is if my assumption of Gateway's margin is terribly off (much higher than $300 out of a $3k sale), or i.e. if Gateway makes a lot more money from these OC systems than I expected.

First, Gateway's margin isn't going to be huge, and I've already been very kind to give a 10% on its high-end system.

Second, if 33% of C2Q sold were OC'd, then Gateway would just make the same amount of money from these systems as if they had never bothered to test it. That is, the extra $100 per system will just about cover the 1/10 increase of assembly cost.

If 50% C2Q sold were OC'd, then Gateway would enjoy 100*17%/300 ~ 6% higher sales margin. If 80% C2Q sold were OC'd, the margin increase becomes 100*47%/300 ~ 15%. If all C2Q sold were OC'd, then margin increases 33% to $400 per $3k system.

So pick whatever guess you like. Granted there are assumptions made, like the base OC cost and the average selling price, but at the end of the day, this is how estimate is done. There's no fanboism here, only logic, which you apparently lack. Do you ever notice that from the beginning you haven't come up with any deduction but just repeat the same old "C2Q OC great" rant?

I'm done with you.

Ho Ho said...

greg
"To me, an advanced process technology yields very well, runs very well, and clocks very well"

Before it yields well it has to mature.


azary omega
"By the way did you know that some people might not want their CPU being overclocked?"

I just assumed that since you already had your CPU OC'd you wouldn't mind getting some extra boost to your CPU power also.


"How old are you? 25ish?"

Almost, 22. And you?


abinstein
"If I'm not mistaken the announcement is that Penryn production will start by the end of this year. This would mean a 2008 release, as scientia said."

I think it was that they will start producing it in 07 and ramping in 08. Somewhat similar to K10.


"WRONG. It's because you can clock the other cores slower to stay in power envelop"

Didn't he just say exactly that?


enumae
"We had previously talked about what percentage 2P servers held in the server space, and how it was read at The Inquirer that it was about 80%."

I highly doubt it is anywhere near as big. I'd be surprised if 2P is >50%. Can you link to that Inquirer story?

enumae said...

Wow, I need a vacation.

I apologize Scientia. The 80% we were talking about was Intel's percentage of ATI's chipset business.

The 80% 2P server debate was on Sharikou's blog around the middle of last year.

Again I apologize.

HoHo

I highly doubt it is anywhere near as big. I'd be surprised if 2P is >50%. Can you link to that Inquirer story?


No, see comment above.

If you look at the comment about 4P being about 5% that would mean that RISC and 8P (and above) servers would account for about 45% of the remaining Server Market which I would find highly doubtful.

I would actually believe that 8P and above would be less than 4P, and that RISC could equal both 4P and 8P combined, leaving about 80% for 2P.

I have no evidence, but those systems are extremely expensive and is why I think they are very low volume.

Jeff said...

abinstein

You still aren't listening to reason, and your estimate implies a perfect world where there is no competitive pricing. The 1/10th higher cost per system is also a very questionable assumption assumption.

Your whole argument also assumes that Gateway would increase the cost of the systems (therefore increasing margins) the higher the OC success rate. It seems to me that the opposite might more likely be true. Costs will be greater the more processors Gateway needs to test before they attain a stable overclock. The greater the success rate, the less gateway can afford to sell the system for.

However the big clincher, and I've said this before and you *keep ignoring me*, is if C2Q's were overclocked, than gateway would have to have some systems preconfigured with the stock C2Q. They don't. Their site only has overclocked C2Q in their stock model. Therefore they have to be selling more overclocked C2Q's than not. How hard is this to see?! Your numbers are right, but you're wrong, and you *are* ignoring the obvious in the same way an extreme fanboy would.

Jeff said...

abinstein
"WRONG. It's because you can clock the other cores slower to stay in power envelop. Gosh I wish you had been to the Intel talks..."

My God man, you are *proving* my point with *every* post you make. You *don't* read. You *don't* listen. You *ignore* anything that runs against your fanboy fantasy world. The only thing you are doing is trying my patience. Read again!

"Dynamic Acceleration Tech —
Penryn will also play with power by introducing a novel dynamic clock speed scaling ability. When one CPU core is busy while the other is idle, *thus not requiring much power or producing much heat*, Penryn will take advantage. The chip will *boost* the clock speed of the *busy core* to a *higher-than-stock frequency*—while staying within its established thermal envelope."

Or, straight from the horses mouth.

"Intel has enhanced the Intel Dynamic Acceleration Technology available in current Intel Core 2 processors. This feature uses the power headroom freed up when a core is made inactive to boost the performance of another still active core. Imagine a shower with two powerful water shower heads, when one shower head is turned off, the other has increased water pressure (performance)."

Scientia from AMDZone said...

Sal
Nehalem is a mid-08 chip.

Intel: More Details on Penryn and Nehalem March 28, 2007.

Nehalem, which will see the light in the second half of 2008

If you have a link to something that says "mid 2008" then post it. And, since this point has clearly been missed I'll make it again:

Nehalem will be released with IMC for 2-way and higher on socket B, and without IMC for single socket. I'm not talking about the version without IMC; it may very well be released in late 2008. I'm talking specifically about Nehalem with IMC and CSI on socket B and I still don't believe this will be released before Tukwila. And, I think Tukwila will be so late in 2008 that a socket B release of Nehalem will be impossible.

I haven't yet seen anything that says that the socket B version of Nehalem will be released in 2008. If you know of anything from Intel that says this then post a link.

abinstein said...

jeff:"My God man, you are *proving* my point with *every* post you make."

jeff, you simply have no idea. When I say you're wrong, it's because I know you are wrong. Had you been to the talk by Intel's engineer about Foxton you'd have known that the technology it's about clock decrease not increase. Basically for 4 cores to run 3.0GHz at the same time would dissipate a lot more than 150W; thus dynamically, during the single-threaded phases, 3 cores are clocked slower than the designed clock frequency.

You don't get performance improvement with 1 3GHz core over 4 3GHz cores, period. Also, this doesn't mean you can clock that one core to 3.4GHz at all.

You weren't there, and you don't know. Stop speak otherwise.

abinstein said...

ho ho:"
"WRONG. It's because you can clock the other cores slower to stay in power envelop"

Didn't he just say exactly that?"


Did you (and jeff as well) actually follow the thread, or do you have limited memory history?

This is what jeff said:"Right, because you can clock the single core C2D faster when there's less heat to deal with. That's kind of my point."

This is wrong. The "single core" of a 3GHz Penryn will not be clocked above 3GHz no matter how idle the other three are.

Scientia from AMDZone said...

ho ho
Where exactly did that 50% number come from? 42% was for specfp_rate2000. Wasn't that benchmark bandwidth limited?

Yes, it was 42% rather than 50% but you missed the point. I don't believe the K10 is 42% faster.

SSE can move 128 bits per clock. The memory controller can move 128 bits per clock. However, SSE is clocked at, say, 2.3Ghz while memory is only clocked at only 800Mhz. You would also need one set for each core so SSE could easily be 12X faster than memory bandwidth.

Does anyone have any idea what was the clockspeed of the AMD quadcore they compared there?

It couldn't be faster than 2.3Ghz.

Scientia from AMDZone said...

abinstein
for 4 cores to run 3.0GHz at the same time would dissipate a lot more than 150W

Wait a minute. So, you are saying that Intel will not release a 3.0Ghz Clovertown? A true 3.0Ghz Clovertown could run with all four cores at 3.0Ghz continuously and stay under 130 watts.

abinstein said...

jeff:"Your whole argument also assumes that Gateway would increase the cost of the systems (therefore increasing margins) the higher the OC success rate."

jeff, please, if you don't understand what I said, would you please stop commenting them? My argument was the exact opposite, that Gateway can lower system price with higher OC rate. Apparently you were not following at all.


"you *keep ignoring me*, is if C2Q's were overclocked, than gateway would have to have some systems preconfigured with the stock C2Q."

I've seen tens of computer systems being purchased from where I worked. None of them is a preconfigured system. So I fail to see how preconfigure or not affects purchase rate.

Also, I think there's been an error in the information you offered me - I just check it myself and see the overclocked C2Q costs $300 more than a non-OC'd one. Guess Gateway can't get enough of those OC'd, uh?

Plugging this new/correct data into my estimate with those assumptions, Gateway only need to sell 10% OC'd systems to remain in the same sales margin. If 80% C2Q sold by Gateway was OC'd, the company would earn 70% more money on these high-end systems. Let's just wait and see how well Gateway perform financially in this quarter.

abinstein said...

scientia:"Wait a minute. So, you are saying that Intel will not release a 3.0Ghz Clovertown?"

Nah... I was making up the 150W number. :-p Please replace it with a more reasonable & lower value, e.g., 85W or 120W, whatever. But the absolute value is not the point (and frankly we were not informed of it during the "Foxton" talk); the point is Intel calculate how much power can be saved with this dynamic clock adjustment and come up with a (expected) TDP that makes everyone happy.

Scientia from AMDZone said...

Well, then let's get back to reality. We know that Intel will launch a 3.0Ghz Clovertown later this year. These would not have any new clock regulation functions. So, full speed 3.0Ghz operation seems doable.

It appears that Foxton on Itanium is now being called EDAT on Xeon. However, this won't be out until Penryn. It is clear from the description that this is to specfically make the quad cores as fast as single cores:

With all cores running workloads, the multi-core system would be clocked lower, but when some cores are idle the chip could potentially run at the same speed as a single core solution would.

This still does not answer the question of whether or not Intel could release 3.2Ghz Conroe's or if they could, why they don't.

Intel Fanboi said...

Greg wrote:
Nice job dodging scientia's point about the masking, roborat.

I'm having a hard time seeing how your last point had any relevance to mine. I was talking about how advanced the process is. You somehow go into a discussion of costs. To me, an advanced process technology yields very well, runs very well, and clocks very well. Is there something I missed here?


Yes you ARE missing something here. roborat is saying that when comparing AMD's 45nm process and Intel's 45nm process we have two data points that are certain: 1. Intel's avoidance of immersion lithography reduces their cost of manufacturing. 2. Intel will be 6 months to a year ahead of AMD at the 45nm node. Both of these are technical acheivements. Engineers balance issues like time to market and cost with having the "best" process.

As to who has the "best" process by just a purely technical comparison? None of us knows for certain, but I would put my money on the company with the 5X research budget.

Greg said...

No, YOU completely missed MY point and SCIENTIA'S point. Using immersion lithography means they only have to use 1 mask during the lithography process. Yes, they take the cost of the equipment, but Intel will have to eventually. And they're probably rushing development on it (since they didn't get the early scanners like scientia describes), which will cost more. So all in all, the immersion lithography doesn't add a cost in the long run, since it doesn't cost more to run it than dry lithography.

Jeff said...

abinstein"please, if you don't understand what I said, would you please stop commenting them? My argument was the exact opposite, that Gateway can lower system price with higher OC rate. Apparently you were not following at all."

Truth be told, I don't think I'm understanding what you're saying, but it's no fault of mine. Your writing is sloppy, and every time I attempt to decipher your meaning I fail because of it. Don't beleive me? Look at the following quotes taken from two of your posts:

"A $100 higher margin (33% of that of the whole system) means that the success rate is roughly 1/3."

"If all C2Q sold were OC'd, then margin increases 33% to $400 per $3k system."

In the first quote you argue that a 33% higher margin makes for 33% success rate. In the second quote you argue that a 33% margin increase makes for a 100% success rate.

I'm perfectly capable of understanding the concepts you've laid out - I have taken university calculus, stats, and business - but not from *you* because you *can't communicate*. Your only defense is "if you can't understand me, stop talking" which is a lousy one, especially if you can't even *talk* properly.

"I've seen tens of computer systems being purchased from where I worked. None of them is a preconfigured system."

Irrelevant, that's where you *work*. These PC's aren't sold to businesses.

"So I fail to see how preconfigure or not affects purchase rate."

Obviously some people don't configure their systems, so you already have an advantage right there. Next, the people who do configure their systems usually don't change every component, so any part in the default loadout is more likely to be picked than another option.

"Also, I think there's been an error in the information you offered me - I just check it myself and see the overclocked C2Q costs $300 more than a non-OC'd one."

You're correct. My guess is that there was a typo on the site when I viewed it. This changes my argument from "bloody obvious" and "almost all" to "somewhat obvious" and "a good portion".

"Had you been to the talk by Intel's engineer about Foxton you'd have known that the technology it's about clock decrease not increase."

Then either this technology is a Foxton derivative, or Foxton's specs have changed. Intel is *now* saying that they are dynamically overclocking single core performance in Penryn (You did *read* the Intel statement I quoted, right?) and so is every news and tech site covering the technology.

Now who should I beleive? Every online site and *Intel itself* or you, some insignificant guy on the internet who thinks he knows it all?

"You weren't there, and you don't know. Stop speak otherwise."

You are beginning to sound like a broken record. "I know better than you so there's no point in arguing with me". How narcissistic. How insulting! You are nothing special, no matter what your parents and your kindergarten teacher told you -- stop kidding yourself.

enumae said...

Greg
And they're probably rushing development on it (since they didn't get the early scanners like scientia describes)...

How do you know this?

Intel Fanboi said...

Greg said:
So all in all, the immersion lithography doesn't add a cost in the long run, since it doesn't cost more to run it than dry lithography.

You do not have nearly enough information to draw a conclusion like that. To begin, you would need to know what yield Intel would get from both dry and immersion lithography. Then you would need to determine the cost of each; cost of machines, maintinence, time to complete steps, etc. Then maybe you could decide between dry vs. wet.

You are also incorrect to say that because Intel would have to buy the machines anyway for 32nm, that the cost is still there. Intel will most likely upgrade N-2 factories to 32nm, as they have always done, or build new factories. When Intel is manufacturing Core 4 at 32nm, they will be pumping out plenty of 45nm chipsets and GFx chips, etc, just like they have always done.

Or you can make another assumption: The company with the world's best silicon manufacturing technology researched both options and knows what its doing.

Am I the first person to say "Core 4"? Will Nehalem be Core 4 Octo? Intel needs a new marketing director.

Roborat, Ph. D. said...

Greg said...
... Using immersion lithography means they only have to use 1 mask during the lithography process.

Please elaborate on this point. What exactly do you mean by only 1 mark during immersion?

Yes, they take the cost of the equipment, but Intel will have to eventually. And they're probably rushing development on it (since they didn't get the early scanners like scientia describes), which will cost more. So all in all, the immersion lithography doesn't add a cost in the long run, since it doesn't cost more to run it than dry lithography.

Completely wrong.
1) Early adopters pay more and suffers through the yield learning curve.

2) “rushing development” of immersion technology. Just to give you an idea, Intel has photolithography solutions going past 16nm. Just because Intel chose not to use it, doesn’t mean they haven’t perfected it.

Azary Omega said...

Roborat, Ph. D. said...
2) “rushing development” of immersion technology. Just to give you an idea, Intel has photolithography solutions going past 16nm.


Have you seen stats of silicon made on that 16nm? Okay then, and don't say nothing about things you haven't seen for yourself.

1) Early adopters pay more and suffers through the yield learning curve

Actually that 'yield learning curve' will apply to intel to the same extend as to IBM because they don't share their tech, so you got no point there ether.

Thank you for making moot points designed to attract uneducated in IT people towards your favorite company (intel). They will need all that fanbase pretty soon.

Roborat, Ph. D. said...

Azary Omega said...
Have you seen stats of silicon made on that 16nm? Okay then, and don't say nothing about things you haven't seen for yourself.


“Stats of silicon”? Yes, that’s definitely the term we use for discovery phase data for next generation products. I seriously doubt you know who I work for and what technology target specs I have access to.

Actually that 'yield learning curve' will apply to intel to the same extend as to IBM because they don't share their tech, so you got no point there ether.

Fabs share industry-common process issues more than you think to enable and improve chemical/material suppliers (i.e., immersion fluid defectivity issues, photo-resist coating materials, etc). This is just one part of the learning curve to improve process and later reduce cost. So please, spare me your inaccurate assumption that Intel/IBM don’t share tech. They do hide some but they can’t hide all and they definitely share some.

abinstein said...

jeff:"Your writing is sloppy, and every time I attempt to decipher your meaning I fail because of it."

As I said, it's just so easy to blame the instructor and the textbook instead of one's lack of intelligence.

If you think the writing's sloppy, point it out where and ask. Scientia did when I scribbled the 150W (yes I was sloppy on that, and thanks scientia for picking it up).

As for you, jeff, when I tell you what "dynamically clocked" is about and the technology behind, you start telling me that penryn must be "a derivative of it." And where did you get that idea? Logic or imagination? Did Intel tell you that a 3.2GHz penryn is going to be clocked higher than 3.2GHz?

Just believe whatever you like and remember to watch out for Gateway's Q2 financial. If it turns out to get a big boost from sales of those OC'd high-end systems, then you know C2Q has good overclockability.

abinstein said...

roborat:"Fabs share industry-common process issues more than you think to enable and improve chemical/material suppliers ..."

Well, it's like saying because two carpenters share the same type of tools and wood supply they must share a lot their carpentry skill.

I frankly don't think so.

And I don't think IBM and Intel get the same high-K material or low-K metal from the same supplier. I don't think they follow the same steps to deposit and etch these materials. Each distinct step they use have tens of parameters to tune to get good result and yield.

However, each company will definitely gain new knowledge from its rival's technology, if it had access to it.

Also, adopting immersion requires some up-front investment but it decreases chip turn around time and increases throughput. Without immersion, double patterning requires more # of steps and (as AMRL's executive jokingly put) more # of dry tools.

Jeff said...

"If you think the writing's sloppy, point it out where and ask."

You *can't* read. I did point out where. Read my post *again*

"Did Intel tell you that a 3.2GHz penryn is going to be clocked higher than 3.2GHz?"

When all of the cores aren't being used, yes, Intel did, they told me and the whole world. They told all the tech sites, which have covered the story. I quoted an Intel statement on it a few posts back, which I mentioned in my first post, but *again*, you *aren't reading*.

"Just believe whatever you like and remember to watch out for Gateway's Q2 financial. If it turns out to get a big boost from sales of those OC'd high-end systems, then you know C2Q has good overclockability."

Ugh. Gateway could report a good quarter and get bad OC's and visa versa. There are many factors involved.

Roborat, Ph. D. said...

abinstein said...

Well, it's like saying because two carpenters share the same type of tools and wood supply they must share a lot their carpentry skill.


I said "industry-common" issues. I didn't say "a lot". don't put words in my mouth.
If i were to use your silly analogy, it would be capenters telling nail suppliers to put a flat head on their nails because they're going to use a hammer.
Now tell me how does that reveal anything about what he's trying to build?

enumae said...

Abinstein
Did Intel tell you that a 3.2GHz penryn is going to be clocked higher than 3.2GHz?

I know your talking with Jeff, but here is a link to an Intel slide showing what they are talking about.

Jeff said...

Thanks enumae. Hopefully after an Intel statement, a snippet from the Tech Report *and* an Intel slide Abinstein will get some sense knocked into him.

Dr. Yield, PhD, MBA said...

Greg wrote:
Using immersion lithography means they only have to use 1 mask during the lithography process.

For 45nm node, likely true. For 32nm, double patterning litho will be required no matter who you are. Pitch splitting will be mandatory to hit true node specs. AMD was using a double patterning technique for gate patterning in 180 and 130 nodes (don't know about below that). They did it because they had to hit THEIR target specs for gate CD and CD control. It was a cost choice- double patterning gave them better gate CDs and CD control which yields better performance. Could it have been achieved with buying better steppers (then they were steppers)? Yes, but then they would have had to buy new steppers. Which leads us to...

Yes, they take the cost of the equipment, but Intel will have to eventually.

Pay me now or pay me later. If you can put the cost off, you can use the money for other things. It's called the time value of money. Intel's financial analysis was clearly that they could meet their process performance specs by using partially/fully depreciated highNA dry scanners for 2 masking steps vs. paying for new immersion scanners now.

And they're probably rushing development on it (since they didn't get the early scanners like scientia describes), which will cost more.

That would be patently false. Intel has had immersion scanners for a long time. They had a 157 scanner too- that never went anywhere, but they had one just in case to do early learning on. What makes you think that the world's largest consumer of scanners wouldn't get early access to a tool for development from either Nikon or ASML? Serious question- not rhetorical.

So all in all, the immersion lithography doesn't add a cost in the long run, since it doesn't cost more to run it than dry lithography.

Really? Care to explain to me how you came to that conclusion? Costs to implement immersion include: depreciation on the new tool set, additional consumables, higher defectivity, lower TPT (compare WPH on a dry scanner vs. wet- it's a substantial difference that negates a lot of the penalty of dual masking, especially on ASML's two-stage scanners), additional cost for RET (resolution enhancement technique) complexity due to the need to model hyperNA + polarization effects... it goes on. Not to say dual doesn't have costs as well- overlay budgets are smaller, NRE costs for masks are higher, tpt hit for 2 mask steps, smaller FE window.

So, Scientia and Greg- there is a lot more to it than "well, the first to get it has all sorts of advantages and 1 step is cheaper than 2 steps." AMD gets some advantages to adopting immersion early, but it comes with some disadvantages as well. For 45nm, it isn't a clear winner on which approach is better. For 32nm, there is no debate- DPL+immersion will be mandatory.

And one more thing- no one came up with the most obvious reason as to why Intel would not go with wet litho for 45nm- the supply wasn't there in time for the process freeze. ASML and Nikon combined probably couldn't provide enough production worthy scanners in a time frame to suit Intel's ramp schedule. Wouldn't swear this to be the truth- but it wouldn't be the first time that happened.

Greg said...

fanboi, I'm putting this in perspective to both AMD and Intel's yields. I'm not saying that Intel can't get a better yield off of their immersion lithography when they use it. I'm simply saying, whether Intel puts off buying it now, or buying it later, they will still end up buying it.

I fail to see how your second point actually means anything.

As to them knowing what they're doing. I fully expect them to know what they're doing, but like scientia pointed out, they didn't buy the earliest models of immersion lithography machines, so they couldn't run tests as early. Also, you cannot know exactly how effective a process will run or what bugs you need to work out until you actually have the machines to work with and test. You can get somewhere with simulation, yes, but somehow I have the feeling that the exact specifications, and problems with these machines are something that the companies that make them hand out whenever, which addresses roborat's idiotic comment.

As to the early adopter's cost. There will probably be a slight reduction in the cost of the machines when Intel buys them, both because they'll be in greater bulk than AMD, and because they'll have bought them later than AMD. However, AMD and Intel are THE early adopters. There aren't that many other consumers of these machines that can cushion the cost for Intel.

Enumae, I realize what you're asking, but first I'll point out that I don't "know" Intel is rushing lithography. I'm just guessing they probably are if they didn't buy the tools as early as AMD. However, it could be they bought the tools at exactly the same difference in time between their 32nm process and AMD's 45nm process. (I realize that's poorly worded, but can't think of a better way to say it).

Dr. Yield, thanks for the good points. They're greatly appreciated.

Yes, Immersion lithography will be complicated to implement, which will lead to some up front costs. However, you stated it has higher defect densities, while AMD and IBM are reporting lower defect densities using it. Also, considering abinstein's point about higher throughput, this seems more like a question of whether the complexity of the implementation and the difference in cost between the toolsets required for dry lithography compared to those of immersion lithography outweighs the opportunity to output more processors and save production cost/wafer.

I realize Intel has had immersion lithography machines in testing for some time, and have not implied they do not currently have it. I am only pointing out that scientia seemed to be implying AMD got their machines before Intel did, which is part of Intel's decision to not use it at 45nm, either to avoid rushing immersion lithography or because they could not ready it in time. It could also have nothing to do with it. I'm not saying it's impossible that this is the case, I'm simply trying to point out that there are other options.

However, your last point makes perfect sense, and now that you mention it, I whole heartedly agree that this is the most likely cause of Intel's lack of adoption at this process node.

Scientia from AMDZone said...

What I said was that AMD's not having to use double masks at the gate layer should counter their increased metal layer. Therefore I would expect AMD's production to be close to Intel's in terms of speed. As for cost, obviously AMD's SOI wafers will still cost more even if the rest of the process were equal.

The big picture is that AMD will move from 45nm to 32nm in just 18 months rather than 24 months like Intel. What this means is that AMD's early (and more expensive) investment in immersion will allow them to release 32nm at the same time as Intel. Intel may not be able to go to 32nm any sooner because of tool availability however I would say that catching up to Intel is something. This could easily be enough to offset AMD's current extra immersion expenses.

There is a huge difference in result BTW. Both IBM and TSMC started evaluating immersion at about the same time but today TSMC is reporting 10X higher defect density while IBM/AMD reports defect density equal to dry. Apparently, IBM/AMD have managed to tweak the resist formula. This isn't that much of a surprise since TSMC has a lower level demand for process tech while IBM/AMD/Sony/Toshiba have undoubtedly poured a lot more money into this project.

Dr. Yield
Now you know what I actually said and you can stop attributing things to me that I didn't say.

Giant
Still no link? I guess we can assume then that your claim of mid 2008 for Nehalem was completely bogus.

Greg said...

Would there not be a drop in overall cost of operation if it only took one masking, thus allowing greater throughput and less time spent in factory per die? (I'm pretty sure this normally counts as a cost savings).

abinstein said...

dr. yield:"Costs to implement immersion include: depreciation on the new tool set

Well, so you suppose that once AMD starts 45nm with immersion it'll stop all 65nm/dry production? Or at the least that it can't sell its dry tools to other companies?


additional consumables

wouldn't double patterning incur that, too?


higher defectivity

which is reportedly overcome by IBM/AMD already.


lower TPT, additional cost for RET, (resolution enhancement technique) complexity due to the need to model hyperNA + polarization effects... it goes on."

You are not listing items that are not orthogonal to each other (which means some are the consequence of another).


I also believe that Intel's lithography seems better that, unlike IBM/AMD, it doesn't require immersion at 45nm. But I also know that the biggest problem of immersion can be summarized to two things: up-front tool cost and higher defect density. Now, the biggest one that AMD's facing is apparently the cost. The other things that you listed are just- there for you to make the list seem long, IMO.

abinstein said...

"I know your talking with Jeff, but here is a link to an Intel slide showing what they are talking about."


Interesting.. because this is different from what I heard in the talk. My guess is some marketing hands were at work to make these slides.

We'll just have to wait and see whether a 3.2GHz Penryn will be clocked automatically at 3.4GHz or higher without overclocking.

abinstein said...

"I said "industry-common" issues. I didn't say "a lot". don't put words in my mouth."

Okay, sorry about the "a lot." But the point remains that carpenters using the same tools and materials can share very little of their skills regarding their best products. Now we're talking about state-of-the-art techs of Intel and AMD, aren't we? Do you really think the industry-common issues they share are a big deal of those techs?

abinstein said...

"You *can't* read. I did point out where. Read my post *again*"

You point out and I answered, but you still didn't understand and start blaming others (me).

What's a better way to show one's incompetence??


"When all of the cores aren't being used, yes, Intel did, they told me and the whole world."

So Intel told the whole world that they're going to sell a 3.2GHz penryn which will be automatically clocked to 3.4GHz when only one core is busy? Why don't they sell it at 3.4GHz from the start? (Oops.. unless they do...?)


"Ugh. Gateway could report a good quarter and get bad OC's and visa versa. There are many factors involved."

So basically you'd believe C2Q's great overclockability no matter what, even when Gateway charges 30% more for OC'd parts, even when Gateway doesn't make big money from selling OC'd systems (which should have much higher profit margin).

Jeff said...

abinstein

"You point out and I answered, but you still didn't understand and start blaming others (me)."

I pointed out and you didn't answer. I told you to read my post again and you *didn't*. Let me quote my old post.

*read* this time!

"A $100 higher margin (33% of that of the whole system) means that the success rate is roughly 1/3."

"If all C2Q sold were OC'd, then margin increases 33% to $400 per $3k system."

You are saying that a 33% higher margin means a 33% OC rate in the first quote. In the second pose you say that a 33% higher margin means a 100% higher OC rate in the second quote. Basically, one (or both) of your statements has to be wrong. Please don't make me have to write this again.

"So Intel told the whole world that they're going to sell a 3.2GHz penryn which will be automatically clocked to 3.4GHz when only one core is busy? Why don't they sell it at 3.4GHz from the start? (Oops.. unless they do...?)"

Now your just acting stupid. The answer is obviously... *drumroll*

...Heat!

"
Interesting.. because this is different from what I heard in the talk. My guess is some marketing hands were at work to make these slides."

My guess is that your a thick headed fanboy, and because Intel announced they are doing something that doesn't fit in your fanboy reality, you refuse to beleive it.

""Ugh. Gateway could report a good quarter and get bad OC's and visa versa. There are many factors involved."

So basically you'd believe C2Q's great overclockability no matter what"

Basically Gateway's quarterly results have far more factors involved than the overclockability of their quad core systems. Nice try trying to twist the conversation into your playing field though.

Ho Ho said...

abinstein
"because this is different from what I heard in the talk"

There is one simple possibility: you didn't understand them correctly.

Jeff said...

""because this is different from what I heard in the talk"

There is one simple possibility: you didn't understand them correctly."

Probably not. Even if he misunderstood the talk, other people wouldn't and we would have heard something.

More likely is that the overclocking part of Foxton was left out for confidentiality reasons, or that the spec of Foxton has changed since the talk to include both underclocking of underutilized cores, as well as overclocking of utilized cores when the others aren't busy.

enumae said...

Scientia

There maybe a AMD X2 6400+ at 3.2GHz.

Thought you might like to see this.

enumae said...

Scientia

Not sure about the credibility of this site, but these are some hefty price cuts coming from AMD April 9th.

Scientia from AMDZone said...

Well, the last time I commented on AMD's price cuts I said that AMD could have a pretty bad 2nd Quarter. As far as I can tell they have nothing to replace the lost revenue. In other words, without new high end chips or increased volume they will lose revenue with price cuts.

sharikouisallwaysright said...

Intel is history - exclusive from Planet3DNow:
K8L (Barcelona) comes with integrated R600

Jeff said...

Here's a link:

http://translate.google.com/translate?hl=en&sl=de&u=http://www.planet3dnow.de/&sa=X&oi=translate&resnum=1&ct=result&prev=/search%3Fq%3Dplanet3dnow%26hl%3Den%26sa%3DG

I wish this were true, but I don't see it happening (integrated graphics should require new socket). What kind of credibility does planet3Dnow have?

sharikouisallwaysright said...

Up to this date they have highest credibility...

Jeff said...

OK, I Google translated the piece, and then attempted to clean up the English a bit. The result:

"Barcelona with integrated R600 graphics.

In regards the chipset/complete PC market, a striking difference shows up between Intel and AMD - Intel offers its own graphics integrated into the chip set, while until recently this has been something AMD lacked.

We were told by a safe source that around the 23/24 of April this will change. Speculations over the delay of the R600 were already many, but now it seems the reason is finally clarified. AMD/ATI plans to offer the R600 and the low cost RV610 and RV630 variants, but also a K8L (Barcelona) with integrated R600 graphics. Just like AMD integrated the memory controller into K8, AMD now wants to integrate the GPU. This chip will profit from shorter signal paths as well as faster internal communication between the GPU and CPU. The graphics chip integrated with the K8L is RV630, an R600 derivative. The R600 core shares DDR2 RAM and can allocate upon need up to 512 megabytes of main memory. AMD plans also to enable crossfire ability when more than one GPU equipped processor is in a system. These GPU’s will make use of NUMA to share memory banks and increase bandwidth, and will gain more bandwidth when the transition to DDR3 takes place. AMD calls this concept GoC (Graphics on chip) and CoC (Crossfire on chip), K8L-V is the codename of these hybrid chips.

The delay of the R600/RV610/RV630 launch is therefore come due to unforeseeable difficulties with the integration of the graphics chip to the processor. AMD decided to launch the entire R600 family, including low cost and GoC derivatives, at the same time. Among other issues, the communication protocol was revised several times to work in tandem with Crossfire. Impressively, crossfire between an GoC chip and a PCI-express graphics card will be possible. In this configuration, both graphics chips share the DDR4 memory from the graphics card, although main memory can be used when needed. The First systems with a K8L-V chip should be available to buy at the end of 2007 in large quantities."

Some parts of this rumor seem odd. Crossfire between the GoC and a PCI-express card? Also, are they saying this chip is being released at the R600 launch, or near the end of 2007? Also, K8L-v? I had though we were through with the K8L moniker.

Still, awesome news if true.

Azary Omega said...

I'm not saying that this isn't true but to think about it, what purpose will integrated GPU going to serve in Barcelona? I can imagine GPU on some lower end K10 like a dual core made for mainstream market ($50-150 range), but why supply a server quad core with GPU?

Jeff said...

I can see *many* uses for an integrated graphics unit.

Notebook:
Lower power consumption, cheaper cost.

Server:
Stream computing FTW.

Desktop:
Game physics and audio processing for high end. Cheap and low cost for low end.

Also, don't forget "if you build it they will come". An integrated R600 would give the GPGPU guys something solid to work with. It also could set the R600 up as the standard for GPGPU, forcing Intel to use AMD's graphics instruction set for their own GoC if it reaches critical mass.

Jeff said...

ARGH! April 1st!

Azary Omega said...

The link refers to Barcelona in specific, not desktop, not notebook but a server chip.

In my previous post i said: "what purpose will integrated GPU going to serve in Barcelona", Jeff, how dare you to try bashing things i didn't say? Who gave you the right to 'assume' that i was talking about Antares or Arcturus or Spica or Altair?

Jeff said...

Don't get your panties in a knot. When most people say "Barcelona" they are referring to the K10 family in general.

In any case, it's an April Fool's joke.

Greg said...

pwnt by the April fools. Hahaha.

Chocolate makes it better said...

I stumbled across your blog whilst surfing the other night and I would love the opportunity to interview you for my up and coming website www.bloggerview.net



My idea is to bloggerview interesting bloggers from all walks of life with different stories. I think that everyone has a story to tell (perhaps even a few J) and If people can go to one central place to read interesting and insightful interviews with their favourite bloggers each week, this would make for a really successful and interesting website for everyone involved.



I would love the chance to ask you a few questions about your blog and how writing your blog impacts on your life and work etc. If you’re interested please email me back on pete@bloggerview.net and I would be really excited about putting together some questions to ask you!



Hope to speak to you soon.
Pete

abinstein said...

ho ho:"There is one simple possibility: you didn't understand them correctly."

Not just me, but everyone at that talk understood the point clearly. Somebody actually raised the question asking whether this technology could also used to optimize performance instead of power - and the answer was no.

The reason is pretty obvious - a quad-core chip with 3 cores turned off simply won't be clocked faster than a single-core chip. Thus max performance for single-threaded codes will always be the same; the difference is now QC chips can be sold at higher clockrate while falling within a moderate typical TDP.

abinstein said...

jeff:"You are saying that a 33% higher margin means a 33% OC rate in the first quote. In the second pose you say that a 33% higher margin means a 100% higher OC rate in the second quote."

jeff... you just can't understand, can you?

The two statements are talking about different margins. The first margin value is of the specific OC'd system sold. The second margin value is of all the systems sold.

Originally you gave the (wrong) information of OC'd system sold at $100 higher price. That is (assumed) 33% of the margin of that OC'd system. If 1/3 of all systems sold were OC'd, then the $100 extra margin from those OC'd systems would just compensate the (estimated) OC cost.

In the second quote, if all systems sold were OC'd, then of course all systems enjoy 33% higher margin.

Really shows how incompetent you are.

Azary Omega said...

Ok Abi are you saying that Quadcore CPU that is sold as 3.2GHz part will clock down to say 3.0 GHz when all cores are active or are we talking about scenario where Quadcore sold as 3.0GHz part will jump to 3.2GHz when only one core is active?

Jeff said...

"Really shows how incompetent you are."

No, it really shows how awful you were at bringing your point across.

In any case, this conversation isn't going to go anywhere. I'll continue it further if I can glean some information from someone at Gateway.

"Not just me, but everyone at that talk understood the point clearly. Somebody actually raised the question asking whether this technology could also used to optimize performance instead of power - and the answer was no."

How long ago was this talk?

Ho Ho said...

... and who were those "everyone else"? Perhaps someone who wrote an article for some site where we could read it?

abinstein said...

"Ok Abi are you saying that Quadcore CPU that is sold as 3.2GHz part will clock down to say 3.0 GHz when all cores are active"

Intel's current processors already have the ability to automatically clock throttle when heat becomes excessive. The technology in penryn will just make this even more power-efficient.

When a (multi-threaded) program enters the "multi-thread execution mode", memory/IO are likely to be the bottleneck, thus you can throttle the clock (say to 75% duty cycles) without much performance degradation, but with much power saving. The trick is you want to quickly identify the single-thread execution mode, and, whenever it occurs, immediately restore the clocks to full duty on the core executing the codes.

OTOH, if you're running multiple single-threaded processes (rather than threads), then the clocks of all cores should stay full duty for maximum performance, unless again the executions become memory/IO bottlenecked or TDP (or temperature) is exceeded.

Of course, we can all hope that Intel will sell a 3.0 GHz quad-core that will automatically clock to 3.4GHz when one core is busy, 3.2GHz when two cores are busy, and 3.0GHz only when all fours are busy. The fact is, this is not going to work efficiently because

1) Core utilization is a constantly fluctuating factor with context switches time in the order of 10us. Changing voltage/freq, however, takes time in the order of 100us.

2) Even if 4 cores are busy, it doesn't mean TDP is going to be exceeded, and there's no reason to use a slower clock unless it is necessary.

Due to the above two reasons, the best way to optimize multi-core power efficiency is to start all programs/cores at full speed, and throttle the clocks (which is not reducing frequency per se, but has approximately the same effect) either when TDP is exceeded or when full clock speed is identified as not needed.

enumae said...

Abinstein

I am not trying to drink the Intel Koolaide, but Intel has shown a slide in which a dual core is able to lower the power of the dormant core and allow the heat that would have been released from the dormant core to be released from the active core while raising the frequency of said active core.

You have only shown your explanation as to why you don't think they will be able to achieve this.

As it was pointed out, can you link to another source that has come to a similar conclusion that will not allow Intel to set one core dormant while running a single threaded application on the active core above the dual core's original frequency?

I am not a programmer, and again I am not trying to drink the Intel Koolaide, but would like something from more than one source which is all we have seen, and that is you.

abinstein said...

enumae:"... a similar conclusion that will not allow Intel to set one core dormant while running a single threaded application on the active core above the dual core's original frequency?"

I think most people who have such a question are confused of what we already have and what we are looking for.

If you're talking about one core stay idle while another at full speed when running single-threaded programs, then current Intels solutions already do that. Even AMD's newer K8 Turions do things like this.

The fact is, in the process granularity level, there are two scenarios: either all cores are busy, or only part of them are busy. The first case is very rare; and when that happens and if temp/TDP is exceed, you clock the cores down (as done in all current P-4 and C2D). The second is dominantly the common case, where you always want to run at full speed.

So again, do you think Intel will sell you a 3.0GHz processor which in 90% cases clocks itself at 3.2GHz?

OTOH, in the thread granularity level, there are things to do that current chips can't. For a running (multi-threaded) program, you can identify the multi-threaded phase (during which memory/IO is likely to be the bottleneck) and automatically throttle the clock to save power usage, reducing the chance that an expensive voltage/freq scale has to kick in; at the same time you want to make sure the single-threaded phase executes on the core with full speed.

Now I have no knowledge of what's really inside penryn or nehalem, but if it's just "clock three cores slower and one core faster," then it's nothing new but just a different marketing package.

abinstein said...

enumae:"... but would like something from more than one source which is all we have seen, and that is you."

Try google search the term "EPI throttling." There's at least a paper, a powerpoint, and an Intel magazine article, all about basically the same thing.

Unfortunately you won't find Intel roadmap nor processor spec in those articles. It's because they are research, not marketing. OTOH, I'm aware of Intel's official (marketing) announcement next generation penryn. If you search "dynamic acceleration technology" you'll find that
1) it's for mobile processors
2) it's when one core is made inactive
Both indicate that this is not about increasing performance but managing power. And in fact this is probably not even the technology I talked about, but just 10% engineering and 90% marketing.

Ho Ho said...

abinstein
"For a running (multi-threaded) program, you can identify the multi-threaded phase (during which memory/IO is likely to be the bottleneck) and automatically throttle the clock to save power usage"

versus

"Core utilization is a constantly fluctuating factor with context switches time in the order of 10us. Changing voltage/freq, however, takes time in the order of 100us."

Actually threads are switched considerably slower. In XP it the scheduler runs at around 16ms or 16000us.

Also, how can a CPU recognize if it is running multithreaded programs and if it is waiting behind IO? My PC is actively running tens of threads, though they don't take 100% CPU.


"Try google search the term "EPI throttling.""

From what I've understood that has nothing to do with enhanched dynamic acceleration we are talking about.

"Both indicate that this is not about increasing performance but managing power"

Please explain how does the "Imagine a shower with two powerful water shower heads, when one shower head is turned off, the other has increased water pressure (performance)" thing fits to your power managment description.

enumae said...

Abinstein
So again, do you think Intel will sell you a 3.0GHz processor which in 90% cases clocks itself at 3.2GHz?

No body mentioned 90%.

Like I said, the slide says something different than you, and I am waiting for a source other than you...

Both indicate that this is not about increasing performance but managing power.

First, I am Sorry, but are you avoiding my question on purpose?

I asked for another source with your same conclusion, can you not find one?

Secondly, it is about increasing performance... "This feature uses the power headroom freed up when a core is made inactive to boost the performance of another still active core."

And in fact this is probably not even the technology I talked about, but just 10% engineering and 90% marketing.

Probably not even what you talked about, this is exactly what we have been talking about, the slide I had posted etc...

I would still like another source with your same conclusion, if you can not find one, please just say it.

Scientia from AMDZone said...

By an interesting coincidence Pete lives in Brisbane. Maybe I'll get a post from someone in Tulsa as well.

I'll see if I can get a new article posted today.

abinstein said...

ho ho:" ...
versus
...


Just thought you should know that clock throttling is not volt/freq scaling.


Actually threads are switched considerably slower. In XP it the scheduler runs at around 16ms or 16000us.

You're mixing up threads and processes. Do you actually see individual threads from Windows scheduler? You must have special eyes...


From what I've understood that has nothing to do with enhanched dynamic acceleration we are talking about.

Oh, sure, one is the actual research and design, the other is just marketing buzzword.

abinstein said...

enumae:"First, I am Sorry, but are you avoiding my question on purpose?

I asked for another source with your same conclusion, can you not find one?"



Oh, I am Sorry Too, but are you being dense on purpose?

There is only one source of the information you talk about, which is Intel's official marketing press (as I already pointed out in a previous reply).

But I thought you said you're not drinking the marketing Koolaide? But you actually do, don't you? Tell me, then, what does "dynamic accelerating technology" mean to you? Does it imply asymmetric cores that are poorly utilized? Does it imply worse multi-process performance? Does it imply excessive volt/freq adjustment overhead? If anyone goes out to implement such a "technology" based on Intel's press release, all above is what he's going to get. And sure, he can sell a 3.2GHz processor as 3.0GHz and claim advancement. Big deal.

My discussion with you stops when you start to mix up marketing with design and engineering.

enumae said...

Abinstein
Oh, I am Sorry Too, but are you being dense on purpose?

You have misunderstood my comments.

There is only one source of the information you talk about, which is Intel's official marketing press (as I already pointed out in a previous reply).

If I had missed that I appologize.

Now since there is only one source and the source is the manufacturer of the future product, why should I beleieve your opinion over Intels press release?

But I thought you said you're not drinking the marketing Koolaide?

I am not trying to, but there are alot of aspects about microprocessors I do not understand.

But you actually do, don't you?

Care to show a little maturity?

Tell me, then, what does "dynamic accelerating technology" mean to you?

It means what the slide and your link are saying...

"This feature uses the power headroom freed up when a core is made inactive to boost the performance of another still active core."

Does it imply asymmetric cores that are poorly utilized?

Does it imply worse multi-process performance?

Does it imply excessive volt/freq adjustment overhead?


I am not in this field, and as such I am unable to answer.

I have to rely on what I read and what I am able to learn in blogs, forums, etc...

If you are trying to make your self appear smarter than I am in this field, it will not be hard and here is congratulation for you prior to your achievement.

If anyone goes out to implement such a "technology" based on Intel's press release, all above is what he's going to get.

And yet you are so sure that Intel is unable to achieve this, why is that?

My discussion with you stops when you start to mix up marketing with design and engineering.

Well I will have to be thankful since most of this post has just been a rant and a lack of comprehension by someone who, as I have admitted, knows more about this field than I.

I was looking for help in understanding your point of view on the topic, but I will concede all you have shown me is that your smarter and I have learned nothing more than what is on the Intel slide.

If you can see my point, I would really like to understand your view, but if you can not then we will obviously get nowhere due to your vastly superior intellect.

Ho Ho said...

abinstein
"Just thought you should know that clock throttling is not volt/freq scaling."

I know that and that was not what I is currently on the subject.Also throttleing is vastly different from powersaving. My Core2 seems to lower it's voltages and clock speed when it isn't fully loaded.


"You're mixing up threads and processes."

Actually I just said how often they are switched. Your writing was a bit awkward and I first thought you said that threads are switched at every few tens of microseconds. Also from what I know, there shouldn't be any difference between threads and prcesses on kernel scheduler level.


"Do you actually see individual threads from Windows scheduler?"

What does the Windows scheduler has got to do with anything? It is just a timer that executes programs at certain times. I was talking about the in-kernel process/thread scheduler.

Perhaps you are thinking task manager? And no, you don't see individual threads there. In fact, you don't see most running processes either.


"Tell me, then, what does "dynamic accelerating technology" mean to you?"

Dynamic: something changes
Acceleration: something gets faster

Put two together and you have something that can get faster dynamically, or when there is a need and possibility. You seem to say that acceleration means that CPU will get slower.

If Intel would be talking about powersaving then why is it talking about increasing waterpressure instead of lowering water usage?


"Does it imply asymmetric cores that are poorly utilized? Does it imply worse multi-process performance? Does it imply excessive volt/freq adjustment overhead?"

Why should any of those things come with dynamically accelerating CPUs? Why is it any different from all sorts of powersaving features? Those things can change in a blink of an eye and nobody cares how long it takes. It is not as it changes millions of times per second, you know.


"There is only one source of the information you talk about, which is Intel's official marketing press"

We have only one source (you) who has the oppinion you have. Can you find a friend who shares your oppinion? I'd even take marketing stuff if you can't find anything better.

Chocolate makes it better said...

RE: Hmmm, since you allow anonymous posts I guess you can't verify that this is actually me. With anonymous posting enabled someone can simply select "Other" and type in someone else's name without having to enter the password. Let me know when you get verification figured out.

Thanks for the tip. I'm not particularly bothered if people want to add someone else's details to my comments. If they want to waste their time doing that, let them go I say. Plus only restricting your comments to people with blogger accounts greatly reduces your readerships ability to comment on your blog, as not everyone has a google account. But......that's just me.


Let me know if you're still interested in the interview.....if the comment thing is an issue for you and you still don't want to do it, that's cool. I understand.

abinstein said...

ho ho:"Also throttleing is vastly different from powersaving. My Core2 seems to lower it's voltages and clock speed when it isn't fully loaded."

The main purpose of clock throttling is power saving. I don't know why else you'd want to throttle the clock.


"Actually I just said how often they are switched. Your writing was a bit awkward and I first thought you said that threads are switched at every few tens of microseconds. Also from what I know, there shouldn't be any difference between threads and prcesses on kernel scheduler level."

The reason that threads do not switched often by the scheduler is precisely because it'd be inefficient to do so. If the thread switching time is around 10s us, then the only way to get any meaningful efficiency is to switch in the order of hundreds or thousands microseconds. The granularity you can observe will be several times larger due to interrupt time/delay incurred when you poll the result.

And of course there are big differences in terms of threads and processes in the scheduler. The former is just a IP change and the L1 cache flush; the latter you're talking about TLB flush and possibly page table change. They follow vastly different subroutines in the kernel codes.


"Dynamic: something changes
Acceleration: something gets faster

Put two together and you have something that can get faster dynamically, or when there is a need and possibility. You seem to say that acceleration means that CPU will get slower."


So that proves my point, that your knowledge of technology comes totally from marketing slogan. Great.


"If Intel would be talking about powersaving then why is it talking about increasing waterpressure instead of lowering water usage?"

Because it's marketing, not engineering, that you're reading. You can't find Intel research paper talking about the same thing as such.


"Does it imply asymmetric cores that are poorly utilized? Does it imply worse multi-process performance? Does it imply excessive volt/freq adjustment overhead?"

"Why should any of those things come with dynamically accelerating CPUs? Why is it any different from all sorts of powersaving features?"

Until now, power saving can be done in process/core level, instruction/circuit level, and clock level. The first is done through volt/freq adjustment. The second is done through reduced speculation or core resource usage. The last is done through clock gating (throttling).

What is missing is the thread/scheduler level. In any multi-threaded application, there is always periods of parallel and serial execution phases. Such phase change time is in microseconds, or about the time to migrate the L1. Here volt/freq scaling is too slow, OTOH, you don't want to do circuit or clock level power saving because they make serial phase unnecessarily slow.

The "new" technology by Intel is supposed to add the thread-level power saving, by identifying the parallel and serial phases, and throttling only the cores that execute the parallel-phase codes.

This technology, however, necessarily make the core asymmetric. Imagine, out of four cores, one has been running the serial phase of a program and spawn off a few parallel threads to the other three. You really want your OS scheduler to keep that main thread on the same core and keep the core running at full speed, while you throttle the other 3 cores for power saving. The cores become asymmetric.


"Those things can change in a blink of an eye and nobody cares how long it takes. It is not as it changes millions of times per second, you know."

Not millions, but surely thousands times per second. What's the granularity of speedstep's volt/freq modulation, though? Not even 100Hz?


"We have only one source (you) who has the oppinion you have. Can you find a friend who shares your oppinion? I'd even take marketing stuff if you can't find anything better."

So I take that you don't read research papers, and you actually think Intel's marketing is more accurate than its peer-reviewed publications. Then sorry, I have nothing else to show you.

You are the same type of people who'd jump up and down for Intel announced its hyperthreading, when not even knowing how it works or how it's different from other SMT approaches. You are the same type of people who totally dismiss Netburst and its trace cache only because Intel and a few websites say they are inefficient and "the past." It seems to me that there's simply no way for you to get those Intel marketing terms out of your logical mind.

Now let me tell you, after reading Intel's the official statements, what do I think the "dynamic acceleration" in mobile penryn really means. The speedstep has the ability to slow down the cores when power usage is exceeded. However, even though that rarely happens (perhaps 10% of all processing time), it doesn't sound very good to the consumers (what? my processors are going to slow down!?). So instead of saying the cores are going to run slower in 10% of time, why not say they are going to run faster in 90% of time where TDP is not exceeded?

This trick was known to work realy well for monkeys, you know.

Ho Ho said...

abinstein
"The main purpose of clock throttling is power saving"

I think we are talking about different kind of throttleing. I'm talking about that one that occurs when chip gets too hot. You are probably talking about all sorts of powersaving features and those can and do change awfully fast. I don't tend to call it throttleing, this is where the confusion might have come.


"And of course there are big differences in terms of threads and processes in the scheduler. The former is just a IP change and the L1 cache flush; the latter you're talking about TLB flush and possibly page table change. They follow vastly different subroutines in the kernel codes."

I take you don't know then that under Linux you have the same cost for changing between threads of one process and different processes. It might be not the same for other OS'es though. For example older MacOS versions had awful scheduler implementation, I'm not sure if/how much have things changed with OSX.


"Because it's marketing, not engineering, that you're reading. You can't find Intel research paper talking about the same thing as such."

So does there exist a research paper talking about the thing you claim the enhanched dynamic acceleration is supposed to be? If you find it I'll believe what you say, not before.


"The "new" technology by Intel is supposed to add the thread-level power saving, by identifying the parallel and serial phases, and throttling only the cores that execute the parallel-phase codes."

I assure you, this is not what Intel proposed. It won't start playing with clock speed and voltages in so little timeframes. My guess is that this won't kick in unless you have had other cores (mostly) idleing for several milliseconds.


"So I take that you don't read research papers, and you actually think Intel's marketing is more accurate than its peer-reviewed publications"

Can you count how many times we have asked you to link to those publications (as a second source)?


"You are the same type of people who'd jump up and down for Intel announced its hyperthreading, when not even knowing how it works or how it's different from other SMT approaches"

I just see something and when I think it is a good thing I tell about it to those who ask and might care. And FYI, I was rather sceptical about C2D performance and became a "believer" after seeing a few independent benchmarks and buyin one myself.


"Now let me tell you, after reading Intel's the official statements, what do I think the "dynamic acceleration" in mobile penryn really means"

In that case they would be saying that "closing one showerhead won't make the other one be less efficient". Your description still doesn't fit with what most think about the technology. I guess we'll see who is right in a few months.

abinstein said...

ho ho:"So does there exist a research paper talking about the thing you claim the enhanched dynamic acceleration is supposed to be? If you find it I'll believe what you say, not before."

Didn't I tell you the EPI throttling? That was before, you know.