Thursday, September 28, 2006

IDF, AMD And Intel In Perspective

Intel currently has the leading performance in desktop hardware. AMD is woefully uncompetitive versus Intel's E6600, E6700 and X6800. The Core 2 Duo architecture strips AMD's top FX chip from being a front line enthusiast's processor to one merely competitive with Intel's third highest speed grade. Essentially, AMD's best processor is mid-range for Intel's Core 2 Duo. Being not one but two full speed grades ahead puts Intel in the peformance lead more solidly than it has been since 2002. If this were the only thing that mattered AMD's position would be rather desperate today. However, AMD has chips that are competitive with E6300 and E6400 and they have the X2 3800+ which is cheaper than E6300. Likewise, Intel has no advantage in the Celeron range which is matched by Sempron. In terms of servers, Intel's Woodcrest is roughly a match for Opteron in single or dual socket. Woodcrest cannot do 4-way and in this area the older Prescott based cores just don't match up to Opteron.

The information from IDF is mixed. Unfortunately, when Intel feels pressed it tends to toss out future technologies with abandon and the show ends up looking like Futurama II from the 1964 New York World's Fair. Unfortunately, people may see these technologies as real rather than the very forward looking demonstrations that they are and forget that Intel has a habit of canceling and scaling back far reaching projects. It takes a special type of mental contortion or extreme forgetfulness to suggest that the same company that recently delivered a scaled back Monticeto late will be delivering processors based on photonics anytime soon.

Although Core 2 Duo is a success it also has to be seen as Intel's failure. Until recently, AMD has been too small to work on multiple processor projects. So, K8 was a one-size-fits-all strategy using the same core for servers, desktops, and notebooks while Intel supported three entirely different architectures. That Intel has switched to a similar one-size-fits-all strategy and is now using C2D for everything while also scaling back work on Itanium shows that Intel was unable to adequately manage all of those projects. Their project management now has been essentially cut in half. They've scaled back from three separate architectures to about one and a half. This is even true in terms of server chips where Xeon used to have many modifications compared to P4. Xeon had 36 bit addressing extensions, plus L3 cache, plus multi-chip support. However, Woodcrest in servers today is much more like Conroe on the desktop than Xeon was like P4. This again suggests that Intel's success with C2D is primarily a function of putting most of its engineering efforts into a single project. Curiously, this happens at a time when AMD is splitting its line into two separate cores for notebooks and desktops/servers. If AMD truly gains an advantage from this, Intel will have no choice but to match with a specialized notebook core of its own to protect its current Centrino market. Unless Intel can do something to overhaul its bureaucracy this would put it back into the same sinking boat it just jumped out of. Similarly, Intel would like to avoid mentioning that AMD's new instructions like POPCNT are specifically to compete with Itanium in the 4-way and up market. Scaling back on Itanium design doesn't really fit with this reality, especially at a time when Woodcrest is limited to 2-way and Presler cored Xeon's are outdated. This means that Intel's entire current server strategy is either due for scale back (Itanium) or end of life (Presler and 5000 chipset).

Apparently, lightening can strike twice as Intel has essentially just repeated the failure of RDRAM with FDMIMM. With Intel's massive pullback of FBDIMM and AMD's cancellation of future plans to support it, FBDIMM is essentially End Of Life upon release. In some ways this is good because it is primarily FBDIMM that is holding Woodcrest back in terms of power draw and performance versus Opteron. Without FBDIMM, Woodcrest should pull somewhat ahead. However, this means scrapping Intel's brand new 5000 series chipset and it will have to scramble to come up with a replacement. Apparently, Intel's real strategy will start Q2 07 with the Bearlake replacement chipset for 5000. This will put a dent in Intel's bottom line because it has spent a lot of money on this technology and will have to continue to subsidize it somewhat for the customers who are buying into it now.

Intel's information at this IDF has been significant both for what was said and what wasn't said. There was no mention of CSI (Common Systems Interface). CSI was supposed to have been Intel's answer to AMD's HyperTransport. It had been suggested that CSI would be released in 2008 and even as early as 2H 07. However, given the extremely long ranged technologies mentioned, like photonics, the silence on CSI is suprising to say the least. If we combine the lack of information about a CSI release with the new initiative to license the Intel FSB (Front Side Bus), and the Geneseo upgrade to PCI-E, we wind up with a picture without CSI. This suggests that Intel's next core release in 2008 will use the current FSB and will not have CSI. More than anything else this leaves Intel without a solid architectural foundation.

It is true that, on the face of it, the FSB licensing and the Geneseo PCI-E standard would be similar to AMD's Torrenza. The proposed speed for PCI-E 2.0 is similar to HT 3.0 and HTX. However, these two are quite different. If a coprocessor plugs into an AMD socket it can communicate with the processor using the same protocol, HT, that it would use if it plugged into an HTX slot. However, there is no similarity between Intel's FSB and PCI-E. Manufacturers can create enhanced PCI-E products but these would not be adaptable to the FSB. It appears that PCI-E will not include a cache coherency protocol whereas HTX could. PCI-E also suffers latency because it has to jump through a PCI-E hub of some sort whereas HTX can connect directly to the processor. Another big difference is that HT 3.0 and HTX will be in systems before Geneseo is even finalized. Also, if Intel were releasing CSI in 2008 then it would have made sense to have folded CSI into the Geneseo initiative and skip the FSB licensing. Geneseo with CSI would be very competitive with Torrenza. Geneseo without CSI is little more than a PCI-E upgrade and not true competition for Torrenza.

It is clear that Intel will not abandon the FSB because there would be no point in licensing a FSB that was going to be dropped and there would be no reason to waste money developing products for a FSB that would be gone by 2008. Therefore, we must assume that Intel is not dropping the FSB. This also has to mean that Intel is not releasing CSI in 2008 and is not following AMD's lead to an onboard memory controller. In fact, the announcement of a GPU built into the Northbridge seems to further bolster this assumption. All of the evidence points to the conclusion that Intel's FSB will be around for several more years. The big question is why. Obviously if Intel can build a memory controller as part of the Northbridge then they could certainly include it on the cpu die. In fact, Intel's Bearlake chipset shows that they have a DDR3 controller ready to go. Using an on-die memory controller requires a separate bus for I/O and interprocessor communication. Presumably, with Intel's experience with PCI-E they have most of the necessary protocol down as CSI is primarily an upgrade of PCI-E. Intel would also need to use a protocol like MOESI instead of MESI as they use now. However, AMD made this change in 2002 on the Athlon MP and there is no reason why Intel could not follow. The only conclusions left are two things. First of all, IBM made a substantial investment on a scalable Northbridge for Intel processors. It may be that Intel wants to maintain compatibility. Intel blundered with RDRAM and has now blundered with FBDIMM. However, it will be able to fix this by releasing another chipset fairly soon. If the memory controller were on the die this would take longer to fix. The biggest reason may be that Intel sees a limitation in speed with an onboard memory controller. If two channels are the practical limit for an onboard controller then potentially the bandwidth could be increased by increasing FSB speed and using more than two controllers on the Northbridge.

The TeraFlop chip was not particularly impressive. These were essentially lightweight processors and IBM has already seen a limit in using Cell. A machine based soley on Cell would be woefully inadequate for general processing as well as any type of computation that exceeded the small memory space contained in Cell. Consequently, IBM used a hybrid design with both Cell and Opteron so that Opteron could handle both the general processing and complex computation loads. Cell is used for small, parallel computation. Pursuing a lightweight processor design that is lower than Cell is unlikely to create anything beyond specialized coprocessor technology. It is also not clear who Intel woul partner with for this technology since they no longer build supercomputers of their own. The only two obvious partners, IBM and Cray are currently pursuing other directions. It is possible that Intel only intends this to be used as a coprocessor with its own procesors. However, even at that, the time frame to deliver seems too long as there will likely be several AMD compatible coprocessors in use by then.

What was not explicitly mentioned in the photonic description was that the only way to multiplex fiber optics is to use separate colors of lasers. This means that having eight channels would require eight separate lasers. There are problems with discriminating the channels while maintaining enough light intensity to carry the signal, as well as problems with having true, monochromatic light from diode lasers. This is not really a near term technology.

Intel showed technology that will not be ready for two or more years. Meanwhile it seems to be abandoning any attempt to create an onboard memory controller with distributed memory and a separate point to point interface. AMD has plans to move to Direct Connect Architecture 2.0 which will enhance their current lead in 4-way and beyond configurations. Intel's direction is very puzzling as it appears to leave Intel with no hope of catching up to AMD in the 4-way and above market. IBM does have a linkable Northbridge that can use the current Intel FSB but this would seem to leave Dell and Gateway with no choice but to use more AMD servers for 4-way and higher. However, the curent memory situation is not ideal for AMD. AMD needs to have low latency memory and unfortunately latencies have increased with DRR2 and will increase again with DDR3. This does not hurt Intel as much as having a large cache can somewhat offset the effect of increased latency.

The current outlook for desktops is unchanged. The Intel FSB has enough capacity to handle single processor systems and even dual processor systems using a dual FSB Northbridge. It is not clear that Intel has a path to adequately reach quad processing systems however these will probably not be a factor on the desktop for several years. AMD's desktop outlook is good once K8L is released in 2007. AMD's 4-way and higher outlook is much better than Intel's due to the switch to Direct Connect Architecture 2.0 in 2008. It is not clear whether Intel is simply giving up on the 4-way and higher market or whether it only has plans to pursue this with the Itanium family. For single and 2-way systems there does not appear to be any current way for AMD to gain a lead over Intel. DIMM speed seems to be the limiting factor. For example, AMD's memory controller on Revision F is capable of handling DDR2 800 memory however memory this fast is not yet available. It may be in AMD's interest to see about creating its own DIMM initiative such as using TTRAM or TTRAM caching on top of DDR DIMMs. It would also be helpful for AMD to create a new DIMM standard such as the HTDIMM that I wrote about earlier. These two technologies are not exclusive. HTDIMM is a configuration for communication and fanout on DIMMs whereas TTRAM or TTRAM caching would be the underlying storage technology. In other words, TTRAM would be technology on the DIMM for storing and retreiving data faster whereas HTDIMM would be technology for communicating with the processor faster.

It appears that AMD is likely to catch Intel with K8L both in terms of dual and quad core. In the near term, 4x4 should make AMD competitive again in the FX range. In the longer term AMD does not seem to be able to gain an advantage over Intel as long as DIMM speed is a factor. However, for servers, it appears that AMD will simply leave Intel behind on 4-way and higher. This IDF had to be very disappointing to anyone looking to Intel for future x86 based server technology.

66 comments:

Anonymous said...

I think what Intel is doing is just trying to be at the level of AMD, check it.

AMD announces plans for Tru64 Quad-Core CPU's and Intel pulls Kentsfield & Clovertown to 2006 from 2007. As I said before, Kentsfield will further hurt Intel, why buy X6800 when Q6800 (or w/e it's called) is the same price? If they plan on having slower Quad-Core's, why buy E6400 when Q6400 is only a bit more? Intel is having trouble enough NOW ramping Dual-Core's, now they want Quad-Core's too? The Red Tape is blinding the ambitious here.

Intel announcing to open up the FSB is news to me, and quite funny news. Developing for the FSB? There will be no point, unless Intel is PAYING you to make it. HyperTransport & FSB cannot compare, HT is just too much faster and more efficient a protocol to be lowed to the level to that of which the FSB is in.

AMD won't have a problem competing at the Single or Dual-Socket level with K8L & Z-RAM. Z-RAM may be slower than typical SRAM, but the fact it is 5x denser provides the ability to mass amount cache as needed for L3 Cache to offset the latencies of DDR2 & DDR3. All K8L CPU's will have minimum 2MB Cache and later 4MB-8MB for DDR3 latencies.

As I see it, Intel is announcing more and more products every day but everybody seems to believe these aren't the vaporware they call AMD's 4x4 & K8L. Keifer, this 80-core "teraflop" (very fake), opening the FSB -- all vaporware. 65nm AMD64 CPU's = Real, 4x4 = Real, K8L = Real, HTX = Real, Opteron Co-Processors = Real, etc. etc. etc.

People are, for reasons unknown to me, supporting Intel and believing all they say with no proof. A company who has lied and providing inferior products to the public compared to their rival's and now announces several projects that will likely NEVER see the light of day and pulling in products (Kentsfield) sooner and sooner to compete with AMD, a rival who is 1/8th their size has WHOOPED THEIR ASS for 5 years -- now tell me, who is TRULY the better company?

r0ck said...

They already have 3 desktop chips ahead of AMD's best.. Why cannibalize their own sales by showing off cooler, faster, more efficient chips[Yorkfield] and other goodies like CSI. I've heard that with IMC, CSI, and Nehalem new core in 2008, there should be a new socket soon. And they still have to sell a good load of Netbursts and make the best that they can out of Core 2.

Teraflop chip=marketing hype, with a slim chance of reality.
"Lasers"=long term, but if implemented, could be big.

And I'm said because The_Ghost couldn't handle my differing viewpoint backed up with facts and numbers and capitalization and correct grammar:(

Anonymous said...

Intel still has the desktop performance crown, whithout 'outdated' FSB, no IMC, no CSI.

They have capacity and inventory of Core 2s to sell, unless AMD has something significant to steal the spotlight, there's not much that they would gain.

http://www.theinquirer.net/default.aspx?article=34641
" The first new core on 45 nanometres is Nehalem, basically a beefed up Woodcrest wih CSI."
Makes sense, new core, new features.

Anonymous said...

Sci
Replacement for the 5000 chipset?
How about the ATI 600 :)
or perhaps they could outsource to VIA
ROFL

Wyrmrider

Scientia from AMDZone said...

Kentsfield is basically the Smithfield strategy for quad core. They'll do a native solution later. They'll have to have a native version of quad core so that they can do 8 core.

Intel isn't planning on making a lot Kentsfields. They've said 1 Million by the time AMD releases K8L. That is about 1% of Intel's production. This is an interesting number. It is 20X greater than the ratio of FX for AMD which is only about 0.05% of production however it is far short of the 5 Million C2D's delivered in 2 months. My guess would be that Kentsfield will not be released in multiple clocks, probably just one clock.

Intel has no choice but to license the FSB. Otherwise it can't match AMD's Torrenza initiative. FSB licensing and Geneseo is the best Intel can do without having CSI.

Well, at this point I think Z-RAM could possibly even be cost competitive with DRAM and run about the same speed. TT-RAM is twice as dense as DRAM but about as fast as SRAM. Z-RAM would be nice now for density but TT-RAM might be needed in the future. Basically, it would be in AMD's interest to avoid moving to DRR4 and even rolling back to DDR if possible. There is also some notion of using TT-RAM on die in place of SRAM cache. Z-RAM may be fast enough for L3 but TT-RAM should be fast enough for L1. More cache could help with increased latency.

K8L can't be vaporware because there are alreay two supercomputers contracted to use them. One will be ready June 1. This too suggests shipments before mid year.

Scientia from AMDZone said...

Why cannibalize their own sales by showing off cooler, faster, more efficient chips[Yorkfield] and other goodies like CSI. I've heard that with IMC, CSI, and Nehalem new core in 2008, there should be a new socket soon.

How does square with the FSB licensing scheme? Why would anyone want to license a FSB that would just get replaced in 2008? That makes no sense.

Scientia from AMDZone said...

Intel still has the desktop performance crown, whithout 'outdated' FSB, no IMC, no CSI.

Yes, I said this in my article. Intel is in the lead on the desktop.

They have capacity and inventory of Core 2s to sell,

Core 2 is less than 20% of Intel's capacity.

unless AMD has something significant to steal the spotlight, there's not much that they would gain.

We'll see what happens when 4X4 is launched and K8L demoed.

http://www.theinquirer.net/default.aspx?article=34641
" The first new core on 45 nanometres is Nehalem, basically a beefed up Woodcrest wih CSI."
Makes sense, new core, new features.


The INQ has been wrong many times. Just explain how the FSB license would fit with an onboard memory controller.

Now, as to the actual point I was making. AMD is now contracted to provide chips for three separate supercomputers all in the top 5 (two of them will be 1 and 2). AMD has already done a major upgrade to the Oakridge machine. How many Woodcrest Supercomputers are currently contracted? BTW, two of these systems will use K8L.

Anonymous said...

"Unfortunately, when Intel feels pressed it tends to toss out future technologies with abandon and the show ends up looking like Futurama II from the 1964 New York World's Fair."

^^
I think you just answered your own question.

Anonymous said...

"Unfortunately, when Intel feels pressed it tends to toss out future technologies with abandon and the show ends up looking like Futurama II from the 1964 New York World's Fair."

Meh. One could interpret this as Intel is ahead therefore has no need to show anything this Fall06 IDF. Or interpret this as Intel feels pressed so shows the world its teraflop/laser tech. But lasers were announced before IDF.
http://www.extremetech.com/article2/0,1697,1522725,00.asp
And Tera Era was announced a couple years back.
http://www.tomshardware.com/2005/12/04/top_secret_intel_processor_plans_uncovered/page4.html#kentsfield_will_be_the_first_desktop_quad_core
THG had die shots of Kentsfield before Kentsfield went live this March. Besides SSE4, which wasn't expected, though also not anticipated, not much new usually debuts at the show.

Scientia from AMDZone said...

Again, you are missing the point:

The recent announcements of FSB licensing and Geneseo seem to exclude both CSI and an onboard memory controller.

If Intel is dropping the idea of CSI and an onboard memory controller and sticking with the FSB this is far more important than the TeraFlop chip or Photonics.

Anonymous said...

http://www.dailytech.com/article.aspx?newsid=4279

"With the introduction of an open FSB platform, Intel will also be making a move towards integrating memory controllers directly onto processors."

http://www.theregister.co.uk/2006/09/27/intel_fsb_pciexpress/

"There are a number of partners around CSI which we will talk about when we talk about CSI next year,"

And some other mumbo jumbo about PCI Express. Point is, IMC and CSI is coming.

Anonymous said...

http://amdzone.net/index.php?name=PNphpBB2&file=viewtopic&t=10127&sid=6315ac134327c389d6c89f20bde68783
You can deny your claims now:)

Scientia from AMDZone said...

With the introduction of an open FSB platform, Intel will also be making a move towards integrating memory controllers directly onto processors.

I would be very interested to see your explanation of how this would be possible. I assume you are aware that other devices used in an Opteron socket communicate via HT, not a FSB. K8 has no FSB.

To have both, Intel would need to add enough pins to its socket to add the memory controller plus a CSI port. With A CSI port and a memory controller what would be the point of having a FSB? This makes no sense at all.

Anonymous said...

He isn't understanding it.

You don't open up a FSB to have it developed for and exclude it from the CPU's die. You don't just throw it into another socket and have no inter-coherency other than CO=>NB=>CPU -- that defeats the purpose.

You also don't have CSI, IMC & FSB on a die and expect things to work.

Anonymous said...

FSB solution is short term. CSI+IMC is 2008+. For all we know, this whole Intel licensing FSB to others is just marketing and they won't do anything til CSI.

Wallachian said...

Scientia, this was your most interesting blog. But I want to comment on some of the things written by the other folks here.

AMD is introducing true quad-core because the nature of HT and IMC, means no MCM solution is possible or is very difficult to implement. While AMD may disregard Intel's MCM solution, deep down I am sure they would know that the die-sizes of true quad is big and cannot be mass-produced. Also yields and cost per die, and the manufacturing costs of 65nm may become telling factors. Thats why I believe AMD may be trying a very quick move to 45nm (mid-2008) so as to mass-produce true quad-cores for desktop and possibly mobile, as soon as possible.

Intel on the other hand is playing it safe. They currently are doing their best to mass produce Core based chips. Spending R&D for a monolithic quad-core just to produce it in limited quantities on an FSB-based platform may be bring in lower ROI, probably a telling factor in their decision to stall true-quad cores for a later generation.

Intel is not doing anything wrong with this approach, AMD certainly isn't either. Its just what works best for either company. What works best for us consumers is performance and power.

I do not think HT has much of an advantage over FSB in single-socket or dual-socket. These sockets makes up 90-95% of the market. Thats why Intel probably didnt push for HT-like interconnect until late in the game. The 4-socket market is just very slowly becoming mainstream, but yes, the margins are very high, and hence the lack of CSI will hurt there. FSB will good enough for desktop, mobile and DP for a good few years.

Since FSB and HT are not playing much of a role in single and dual-socket, the performance leadership between the 2 companies mainly falls on the IPC of the cores. Woodcrest may fall slightly behind due to the wretched FB-DIMMS. But Conroe or Kentsfield will still probably hold its own (they wont suck like Smithfield/Presler).

Scientia, unfortunately FB-DIMMS are the future. Intel may have dropped it from their plans for low-end servers (we dont know this for sure). But for high-end servers FB-DIMMS are a necessity, large memory capacities are important for high transaction performance. For low-end servers you mainly look at FP performance, and int performance, FB-DIMMs can play a diminishing role here. So FB-DIMMS will become necessary for large 4-socket servers, and AMD probably hasnt dropped their plans here. I dont think we shouldnt believe everything the Inq says. They are not very accurate most of the time.

Anonymous said...

"There are a number of partners around CSI which we will talk about when we talk about CSI next year,"

You could always ask Intel:)

Anonymous said...

[quote]It appears that AMD is likely to catch Intel with K8L both in terms of dual and quad core. In the near term, 4x4 should make AMD competitive again in the FX range. In the longer term AMD does not seem to be able to gain an advantage over Intel as long as DIMM speed is a factor.[/quote]

Great analysis scientia! However u didn't take into considaration the "ATI card" that could help AMD get the edge again. Do you think that some kind of gfx functions integration into the cpu core + a gfx card on a HT link could give AMD the lead again?

K8L won't give superiority over C2D, but couldn't ATI help somehow ?

Scientia from AMDZone said...

You can deny your claims now:)

You're going to have to be more specific. What exactly would I need to deny? I didn't see anything unusual in that thread.

Scientia from AMDZone said...

You could always ask Intel:)

I'm sure Intel would be just as honest as they were about 64 bits for x86.

Scientia from AMDZone said...

FSB solution is short term. CSI+IMC is 2008+. For all we know, this whole Intel licensing FSB to others is just marketing and they won't do anything til CSI.

I'm really baffled why this seems to be so difficult for others to understand. CSI + IMC replaces FSB.

You cannot have a short term solution for something that will be canceled in a year. The devlopment time alone could take a year. The products would be ready at the point when the FSB was gone. Nor can you license FSB after you've replaced it with CSI and IMC.

If Intel were really going to release CSI in 2008 then their partners would be busy today devloping interfaces for CSI and the new socket that an IMC would require. There was no announcement of either. A CSI interface specifically excludes using the FSB as an interface. FSB licensing means no IMC and no CSI.

Anonymous said...

Scientia, this is what I ran into. Intel Fanboys don't understand technology or business and cannot logically debate anything, all they see is THG & Anand showing 1,000 FPS for Conroe and they go "yippie!".

They will never understand that Intel is NOT bringing out CSI or an IMC EVER for Servers or Desktop solutions (nor Mobile). There will not be anything but FSB FSB FSB for years, regardless of what Intel says. Intel can say they plan to bring out CSI in 2008 w/ an IMC, but they fail to realize the negative impact on 3rd party companies this causes.

Intel Fanboys, stop being dillusional and open your eyes to the truth.

Scientia from AMDZone said...

AMD is introducing true quad-core because the nature of HT and IMC, means no MCM solution is possible or is very difficult to implement.

Not exactly. If AMD really wanted to they could split the double wide memory controller into two. Then they could give half to each die. They would have to sacrifice one HT link for cache coherency however with three for each die they would still have enough for three external links. Many had speculated that AMD was going to do this very thing. The INQ speculated about this and a configuration where only one die had the full controller several times.

While AMD may disregard Intel's MCM solution, deep down I am sure they would know that the die-sizes of true quad is big and cannot be mass-produced.

This argument really isn't valid. K8L on 65nm will be a similar size as the current X2 on 90nm.

I believe AMD may be trying a very quick move to 45nm (mid-2008)

AMD has already stated several times that they will start making 45nm mid 2008. It's possible this could bump up to end of Q1 08 but no earlier than that. Intel might even get some chips out before Q4 07 is up.

Intel on the other hand is playing it safe. They currently are doing their best to mass produce Core based chips.

Actually, they are currently mass producing P4's. C2D is at most 20%. Kentsfield is even lower, only about 1/5 of the ramp of C2D.

Spending R&D for a monolithic quad-core just to produce it in limited quantities on an FSB-based platform may be bring in lower ROI, probably a telling factor in their decision to stall true-quad cores for a later generation.

No. I think the reason is that Intel can't engineer one that fast. It's taking AMD about 1 1/2 years from true dual core to true quad core. It looks like it will take Intel about the same. They can rush MCM out the door faster like they did with Smithfield. However, AMD isn't doing this because it doesn't want to split its resources.

Intel is not doing anything wrong with this approach, AMD certainly isn't either.

I'm sure Kentsfield will be better in some applications just like Smithfield. But it won't compare to K8L.

Its just what works best for either company. What works best for us consumers is performance and power.

Which you'll you'll eventually get when Intel releases a native quad core.

I do not think HT has much of an advantage over FSB in single-socket or dual-socket.

You'll see some deterioration with both Kentsfield and Clovertown if proper testing is done at some point.

These sockets makes up 90-95% of the market. Thats why Intel probably didnt push for HT-like interconnect until late in the game.

Apparently, Intel has given up on CSI, at least for x86.

The 4-socket market is just very slowly becoming mainstream, but yes, the margins are very high, and hence the lack of CSI will hurt there. FSB will good enough for desktop, mobile and DP for a good few years.

Dual socket/dual core is not yet mainstream. It's getting close though. You can buy a couple of 3800's and a dual socket motherboard for a midrange price. You can do the same with a Smithfield setup.

Since FSB and HT are not playing much of a role in single and dual-socket

Which means you don't understand about HT. There are motherboards that run today with Intel processors that which use HT to talk between the North and Southbridge chips. Apple Power Macs used to run with HT. I believe the last number I saw was 300 Million devices already made with HT. has clearly established itself in multiple high-volume markets and appears to be well-supported with shipping silicon and infrastructure products by major players in the personal computer, networking, server, communications, embedded systems and consumer market segments

HT is becoming a well established standard and that normally leads to variety and low cost.

, the performance leadership between the 2 companies mainly falls on the IPC of the cores. Woodcrest may fall slightly behind due to the wretched FB-DIMMS. But Conroe or

It looks like K8L will come out just in time to compete with the Bearlake chipset.

Kentsfield will still probably hold its own (they wont suck like Smithfield/Presler).

Kentsfield and Clovertown are worse than you think. Conroe is fine.

Scientia, unfortunately FB-DIMMS are the future. Intel may have dropped it from their plans for low-end servers (we dont know this for sure).

Jedec had contingency plans for the non-adotption of FBDIMM.

But for high-end servers FB-DIMMS are a necessity, large memory capacities are important for high transaction performance.

Maybe. It has been suggested that microbuffering on registered DDR will compete. I guess we'll see. You have to admit that FBDIMM doesn't look competitive now.

Scientia from AMDZone said...

Mike, that's a bit harsher than I try to be. I have no idea what any given person's comprehension is of FSB, CSI, HT, and IMC. You know there is something geeky about you when you can use that many technical abbreviations in one sentence. Anyway, I'm open to any reasonable argument about it.

I can't see any possible way that Intel can do both FSB licensing and IMC. And, without IMC, CSI is not entirely useless but wouldn't be as much of a priority. But still, it would seem that if Intel were going ahead with CSI that they would have had to include that in the FSB licensing and Geneseo announcement. Intel's processors currently use the FSB for all communication. If Intel were going to change the standard to a P2P bus they would have to do it now.

Anonymous said...

Good post - a couple of questions:

"There are problems with discriminating the channels while maintaining enough light intensity to carry the signal, as well as problems with having true, monochromatic light from diode lasers."

Is the intensity really an issue with distances we are talking about here?

Also I'm not sure how the multi-channel fiberoptics work, but do you really need a separate light source for each channel?

Anonymous said...

As I see it, Intel is announcing more and more products every day but everybody seems to believe these aren't the vaporware they call AMD's 4x4 & K8L. Keifer..."

MMM - please point us to an announcement on Keifer, you keep mentioning this (even in your blog). Are you basing all of this from the article on THG (or was it Anandtech?), which had a paperstudy of this project that was several years old and they acknowledge that it was unclear whether Intel was working on it anymore.

Anonymous said...

"How does square with the FSB licensing scheme? Why would anyone want to license a FSB that would just get replaced in 2008? That makes no sense."

Just a thought - perhaps CSI won't go on all products instantaneously? Maybe the focus will be on MP servers where CSI is actually needed? (I'm speculating, but then again so is most everyone else on this blog)

Anonymous said...

"But still, it would seem that if Intel were going ahead with CSI that they would have had to include that in the FSB licensing and Geneseo announcement"

Perhaps Intel will split interconnect strategy starting with Nehalem between MP server (CSI) and desktop (FSB)?

Also if you look at the economics of the MCM solution it is a good approach from a business/flexbility perspective. Some folks seem to be horrified at the elegance of 2 die "glued together" but for 1 and 2 scoket solutions it should be fine. (the 2P part is speculation on my part as I have not seen any benches on quad MCM 2P solutions)

- bin splits will be better as you can match 2 dual core speeds appropriately, whereas with "native" quadcore you have to binsplit by slowest performing core. As process complexity continues to grow with technology node scaling I think folks are underestimating the true benfit this may have.
- The potential yield benefits I think are obvious to almost all who don't believe in near 100% yield.
- If needed you can cherry pick low power parts for quad core to help minimize overall TDP. This again will help with bin splits.
- If demand shifts dranatically between dual core and quad core, this shift can be made much later in the game with MCM solution as opposed to native which is locked once first mask layer is reached (unless you are willing to throw away half of the die by fusing it - and I'm not even sure if this can be done). Similarly if quadcore demand grows ahead of expectation, dual core wafers in line can be used and packaged for MCM quad core.

So while considered by many as a bandaid, I think this is a useful plan for the early stages of the technology adoption. Once the demand and technology matures, moving to a "native" soltuon makes sense (as Intel did on dual cores and plans to do on quad cores). The main problem Intel had with the 2 die dualcore solution was the chip (P4) architecture.

Anonymous said...

"They will never understand that Intel is NOT bringing out CSI or an IMC EVER for Servers or Desktop solutions (nor Mobile"

Not sure how you can make this statement unless you work for Intel in the design area. So all of the talk of CSI on Nehalem design is just one big giant smoke screen? I'm not saying it will definitively be on that design but clearly Intel is working on it.

Anonymous said...

"It is clear that Intel will not abandon the FSB because there would be no point in licensing a FSB that was going to be dropped and there would be no reason to waste money developing products for a FSB that would be gone by 2008. Therefore, we must assume that Intel is not dropping the FSB."

This is very poor (and flawed) use of logic - becasue one technology will continue to exist (FSB) another technology cannot (CSI)? I'm not saying both technologies on same design, but perhaps there will be some product segmentation?

Also, as entire industry cannot simply purge itself of a technology instantaneously - even if Intel moves some of it's next designs onto CSI, there will stil be a strong need for FSB support and development.

Finally if Intel moved a design over to CSI, I find it unlikely they would do this across the board on all designs until the tech matured.

Anonymous said...

"Apparently, lightening can strike twice as Intel has essentially just repeated the failure of RDRAM with FDMIMM"

This is a bit of an exaggeration - TIMNA had an ondie memory controller, so failure of RDRAM to become mainstream killed the chip design and product whereas pullback of FBDIMM means a new chipset (as you correctly pointed out) and not a scrap of a chip design.


This is one of the advantages of the FSB approach - you are essentially decoupling RAM technology from chip deisgn. Before the flames start - I'm not saying FSB is better or worse than IMC; this is just one of the advantages of the FSB design and disadvantage of IMC.

Scientia from AMDZone said...

Is the intensity really an issue with distances we are talking about here?

Yes, because we are talking about microscopic lasers. These are tiny even compared to diode lasers like are used in CD players.

Also I'm not sure how the multi-channel fiberoptics work, but do you really need a separate light source for each channel?

Yes. Lasers are one color. The way you multiplex is by shining multiple colors through the same fiber. The problem is that each color needs a separate laser and you have to split the lightbeam back into as many colors as you are using. There is no way to do this without splitting all of the colors and then filtering. This cuts brightness by an order of magnitude. It might be possible at some point to use a diffraction channel separator which would allow for a much brighter signal. You wouldn't actually need multiple channels to use it externally for something like a HyperTransport carrier.

Scientia from AMDZone said...

Just a thought - perhaps CSI won't go on all products instantaneously? Maybe the focus will be on MP servers where CSI is actually needed? (I'm speculating, but then again so is most everyone else on this blog)

I see. You are thinking that Intel would use CSI and IMC for Woodcrest and not Conroe? That doesn't make sense; these two use almost exactly the same die. The other problem with this theory is that in order to add a coprocessor to a socket it has to be a dual socket or higher motherboard. And, to have the cpu talk to the coprocessor the cpu needs to be DP or MP.

Anonymous said...

http://www.theinquirer.net/default.aspx?article=34543

Intel integrates graphics core into memory controller as well as CPU

Graphics isn't particularly necessary for servers. IMC is definitely making it into mobile. And desktop and servers while they're at it.

Anonymous said...

Perhaps Intel is using FSB[CSI] in a loose sense, the way that they're announcing 80 cores[simple] in 5 years.

http://www.theregister.co.uk/2006/09/21/intel_open_chips/
"Last month, Intel held a CSI partner day of sorts in Portland. Close to 30 companies attended the event at which Intel laid out vague plans for CSI. The technology, due out in 2008, is a response to AMD's Hypertransport technology that allows processors and other components to communicate. When CSI arrives, Intel is also expected to move to processor designs with integrated memory controllers"

http://www.channelregister.co.uk/2006/09/27/solaris_itanium/

"confirm CSI-zipped Itaniums in 2008"

http://www.theinquirer.net/default.aspx?article=34543

"Intel integrates graphics core into memory controller as well as CPU "

I see no evidence to suggest that Intel canned IMC/CSI. No prescence at IDF and announcing 'FSB' licensing doesn't cut it. So do you still believe that they are?

Anonymous said...

http://news.com.com/Intel+wants+to+offer+servers+in+your+size/2100-1010_3-6120505.html

Addressing to the other anonymous dude that talked about product segmentation..

"In the future, Intel will probably support both [DDR/FBDIMM] memory technologies for different categories of servers as part of this "hyper-segmentation" approach, as Gelsinger put it."

"Likewise, Intel could have products that use integrated memory controllers for a speedier connection between the processor and memory, as well as chips that keep its current, front-side bus design, in which signals have to pass through a bus before they reach the memory."

http://news.com.com/Intel+server+revamp+to+follow+AMD/2100-1006_3-6113507.html

Look, more articles about CSI/IMC with interviews/quotes straight from Intel.

Anonymous said...

"The other problem with this theory is that in order to add a coprocessor to a socket it has to be a dual socket or higher motherboard. And, to have the cpu talk to the coprocessor the cpu needs to be DP or MP."

So you see mobile moving 2 a socket solution/coprocessors? Entry level desktop parts? Even AMD acknowledges 4x4 is an enthusiast solution.

I'm just speculating for mobile and typical entry level desktops systems, FSB may suffice for next couple of years and CSI/HT may only be needed for "higher end solutions" (server and maybe high end DT). Intel may be planning a phase in of CSI in this regard?

The only problem I see with your response is you assume coprocessor will be widespread in DT space; I honestly don't see dual socket solutions penetrating desktop/mobile space significantly (meaning >10%) for at least the next 2-3 years. Are you of the opinion co-processors will shortly become commonplace for mainstream desktop?

If FX4x4 is meant to replace FX which consititutes <0.5% of AMD's sales I don't see this capability as a must have for the mainstream products.

You are also assuming that Intel will continue to have one unified design across desktop/server/mobile for future microarchitecture designs - I have no information on this one was or the other.

Anonymous said...

http://www.hardforum.com/showthread.php?t=1100706&page=2
9.24.062 Intel workers, Wootium and Poncho ramble on about new sockets, 6 core CPU, CSI, what CSI brings..

"Well.... not CSI exactly, but rather what CSI is bringing with it." Says Intel guy

"Let's see, how about: an ODMC." Says random guy

"I don't know what you are talking about...." Says Intel guy with smiley at the end responding to random guy.

Scientia from AMDZone said...

These two don't really seem to be all that plugged in. And, they don't really say anything. One does claim that a new socket is coming soon. However, he doesn't say if this is mobile, desktop, server, or even Itanium. BTW, can you name any actual fact that was leaked on hardforum first in the past?

Scientia from AMDZone said...

The only problem I see with your response is you assume coprocessor will be widespread in DT space; I honestly don't see dual socket solutions penetrating desktop/mobile space significantly (meaning >10%) for at least the next 2-3 years. Are you of the opinion co-processors will shortly become commonplace for mainstream desktop?

You aren't understanding what I'm saying. It keeps being suggested that CSI and IMC will come out on server first where it would be needed. What I said was that coprocessors would require a dual socket motherboard and at least a DP chip to work. So, this isn't entry level. I'm saying that FSB licensing seems to affect the very market segment where CSI/IMC would be needed most. That's a problem.

If FX4x4 is meant to replace FX which consititutes <0.5% of AMD's sales I don't see this capability as a must have for the mainstream products.

It isn't must have. It's a premium price range.

Anonymous said...

http://news.com.com/Intel+wants+to+offer+servers+in+your+size/2100-1010_3-6120505.html

Addressing to the other anonymous dude that talked about product segmentation..

"In the future, Intel will probably support both [DDR/FBDIMM] memory technologies for different categories of servers as part of this "hyper-segmentation" approach, as Gelsinger put it."

"Likewise, Intel could have products that use integrated memory controllers for a speedier connection between the processor and memory, as well as chips that keep its current, front-side bus design, in which signals have to pass through a bus before they reach the memory."

Your original question was if IMC/CSI was canned. Overwhelming evidence that it isn't, such as they had a CSI day a month ago.. Couldn't Intel have DP CSI and also DP FSB if they're hypersegmenting?

Anonymous said...

"Core 2 is less than 20% of Intel's capacity."

I meant that they have 65nm factories up and running for Core 2 production. They only have 1 45nm factory doing test wafers, 2 more yet to come online.

Anonymous said...

It's amazing that you can point out Sharikou's BS but you can't point out some on AMDzone ;).

http://amdzone.net/index.php?name=PNphpBB2&file=viewtopic&t=10135&sid=88bbac2041909154505f0bbc6f186894#115709

He got his 150mm figure from a fan made slide running around the web, spreading it around the poor misinformed AMD. I don't feel bothered for the math, but many are concluding aroun ~300mm for the die size.
http://techreport.com/onearticle.x/10898
"..each quad-core die has an area somewhere in the neighborhood of 300mm². For reference, Intel's Core 2 Duo has a 143mm² area, so it follows that Kentsfield, which is just a couple of Conroe dies on the same package, has an aggregate die area of 286mm²."
And if you don't post this here, at least PM him. Sad the BS that he feeds to others.

Anonymous said...

http://amdzone.net/index.php?name=PNphpBB2&file=viewtopic&t=10135&sid=3b0ed912397ce3684af33a960e241081#115709
Claims 150mm here based on
http://www.overclockers.ru/images/news/2006/05/17/quad_01.jpg
http://www.xtremesystems.org/forums/showthread.php?t=117702&page=2
Is on this thread, past the posts about ~280mm K8L, conviently does not edit/deny his 150mm claim and just moves on.

Your love of AMD is blindsiding you from the BS of AMD fanboys such as MMM[flames anyone saying anything about Intel.."stupid fanboy!", he means well, bad temper though]
The_Ghost..Always defensive over nothing. His use of grammar grates, reminds me of Sharikou.
Sharikou..o.o
You can try looking up posts from BaronMatrix, MadModMike, MrsBytch, 9-inch on THG to see why AMD drones are dreaded so much.

Anonymous said...

"However, he doesn't say if this is mobile, desktop, server, or even Itanium. BTW, can you name any actual fact that was leaked on hardforum first in the past?"

Nope they(Intel employees from [H]) didn't(about platform), but your original question if CSI was canned period. It's not and Itanium with CSI should come 2008. THG reported that Kentsfield should come with 1333FSB but one of them said 1066FSB only.
http://www.hardforum.com/showpost.php?p=1029974634&postcount=15
On 9.19, he said quads at 45nm at 1333.
Then on 9.27
http://www.hkepc.com/bbs/news.php?tid=675864&starttime=0&endtime=0
Then when everyone seemed to think that Clovertown would be 1066 also only..
http://www.hardforum.com/showpost.php?p=1029976303&postcount=20
Retracts his statement, and others report same also.
http://www.hardforum.com/showpost.php?p=1030006578&postcount=6
FSB should be gone within 5 years, 2 years earliest.

Scientia from AMDZone said...

It's amazing that you can point out Sharikou's BS but you can't point out some on AMDzone ;).

You must believe all of that hype they talk about over at Forumz. Two other people corrected the 150mm figure besides me. In contrast, I've seen misinformation go entirely uncorrected over at Forumz.

Scientia from AMDZone said...

Your love of AMD is blindsiding you from the BS of AMD fanboys such as MMM[flames anyone saying anything about Intel.."stupid fanboy!", he means well, bad temper though]

Are you talking to me? I make corrections on AMD fansites all the time. I don't tend to be biased in favor of AMD in terms of my reasoning. Sharikou, MMM, and George all tend to be very pro-AMD. Others tend to be very pro-Intel. I don't tend to give either AMD or Intel credit just because of their name.

The_Ghost..Always defensive over nothing. His use of grammar grates, reminds me of Sharikou.
Sharikou..o.o


Personal attacks don't really help your arguments. Interestingly, these types of personal attacks are very common over at Forumz. There is hardly any of this at AMDZone.

You can try looking up posts from BaronMatrix, MadModMike, MrsBytch, 9-inch on THG to see why AMD drones are dreaded so much.

I'm familiar with 9-inch at THG. Apparently, 9-inch used to link to my articles at AMDZone a lot. The people on ForumZ were speculating that 9-inch was MMM. Some speculated that I was 9-inch which is interesting because anyone can see that our writing styles are completely different. Both MMM and 9-inch were banned.

Name calling and personal attacks don't help an argument which is why I said something to MMM. If I get comments that are too flaming, they won't get posted.

Ghost at times, does take comments about AMD too personally. Ghost tends to be a bit pessimistic about Intel but there are people on AMDZone who are more pessimistic about AMD. It balances out. AMDZone is much less biased and much more civil than ForumZ.

I've seen comments over at ForumZ many times about how AMD fansites were spreading misinformation about Intel when I knew that the information they were talking about wouldn't last 2 posts at AMDZone without getting corrected. In contrast, I've seen misinformation about AMD posted at ForumZ many times that went uncorrected. You are far more likely to find accurate information about Intel at AMDZone than you are to find accurate informatioin about AMD at ForumZ.

Scientia from AMDZone said...

Yes, Intel has a lot of capacity. This is why Sharikou's arguments about bankruptcy are ridiculous. AMD simply cannot produce enough chips to fill half the demand by 2008. Even if Intel's chips were less desirable (which C2D is not) they would still have a market.

The micro-segmentation argument is interesting. Basically, you are suggesting that Intel will do both FSB and IMC (Integrated Memory Controller, also called ODMC, On Die Memory Controller). This would essentially be a shotgun strategy where Intel would try to use massive variation to thwart AMD. This is possible.

However, this type of strategy is not very affective. If Intel really is moving to CSI then vendors won't develop for FSB. FSB would only get covered if Intel did the development. However, presumably the whole reason for opening up the FSB is for third party development. Trying to go two different ways will just make Intel look unfocused. If this is really what Intel is trying to do then the FSB licensing will be a tremendous failure. No one will do development for FSB if Intel is really moving to CSI.

Anonymous said...

The hype? Please back the incorrect info going uncorrected, I've seen it fly too much on AMDzone. I would be able to look up just one person's posts if I wanted to find BS, but he cannot handle discussion when he is the one wrong, so just bans anyone that doesn't agree, so therefore I would have to hunt down his posts, rather than search for it.


Me: They had working samples of Kentsfield since at least Spring06. They could've released them earlier, though at expense of supply and quality.

Him: but they didn't , just like they didn't release the conroe early

..The purpose of my pointing out that Kentsfield were working since March was that I said K8L desktop would be Q307 earliest, he said AMD could pull it up also. Only Intel has functional parts to pull up, AMD has wafers.

He: how many conroe based cpu's have they sold already ? 5 million ? if they released the kentsfield , they would have half the kentsfield made as conroes

...

I realize now that half the BS on AMDzone is from 1 person, that posts about 5-10% of the board[20K o.o]

"this intel's show , don't you think that there ia a reson why amd is not at or near the idf ??"

AMD has crashed IDF many times in the past, he should refrain from things he does not know about.

"C2D has SSE4"
Not him, but uninformed BS again.

Anonymous said...

More civil, sure, biased, not really, when only pro AMD sentiment is allowed. Calling Ghost defensive is more of an analysis rather than a personal attack[ok making fun of his grammar and equating him to Sharikou wasn't nice:D].
MMM banned for flaming[insults] I suppose, 9-inch for trolling[idiotic spamming, BS in general].

The misinformation of AMD on THG is caused by BaronMatrix and others.

Geneseo is mostly about PCIe though right? FSB only for extreme cases, and those extreme cases are probably on board for CSI designs, which we should hear more about next year.

Anonymous said...

From AMDzone, I can't believe you actually try to justify AMD over Intel, on their ways of bashing each other :D

From AMD/Intel interviews, Intel says it's always cautious about its competititor, AMD always bragging. AMD crashing IDF with all kinds of fancy shenanigans, finally quitting IDF with a petty book for all attendees, and because it's more 'fancy and clever', that somehow puts AMD above Intel.

Not saying Intel is a saint either, but your argument is absurd.

"There was no indication that it contained any attacks on Intel."

..Err..

"We aren't attending this year's IDF, but were hoping you could pass something on to Intel for us. Included is a little something that we think Intel and its customers should find especially useful.""

Anonymous said...

"This is nothing but sour grapes on the part of Anandtech. Their attitude is that if AMD won't give them a scoop then AMD's tech was no good anyway. This too is childish. "

Um..What was that in regards to?

Scientia from AMDZone said...

Geneseo is mostly about PCIe though right? FSB only for extreme cases, and those extreme cases are probably on board for CSI designs, which we should hear more about next year

CSI is supposed to be a version of PCI-E that includes cache coherency. This is similar to AMD's HyperTransport which includes both cache coherent and non-cache coherent versions. Most I/O chips don't need the cache coherency but some coprocessors may. HTX is just a slot. Before HTX there was no way to directly connect an HT card to the processor. This is an area where I really don't understand Charlie's objection to Geneseo. Many companies have used HT without cache coherency for the past four years. Geneseo is just a tweak to the PCI-E 2.0 standard. I can't see any reason why it wouldn't be used.

However, if a FSB is used then the coprocessor would plug into a processor socket on a dual socket or higher board. This chip could directly access memory and would maintain cache coherency over the FSB and not with CSI. Geneseo can be used with the FSB or with an IMC. However, CSI can't be used with a FSB, only an IMC. So, I do not see how FSB would be onboard with CSI; these are mutally exclusive. Pushing a FSB licensing model would seem to be a cancellation of both CSI and IMC.

Anonymous said...

They had CSI day a month ago, recently looking to hire graphic engineers to help them implement graphics into memory controller that would be on the CPU, Poncho from [H] with his correct[though not unexpected] predictions saying it should be 2 years fastest for all platforms to have CSI/IMC.

Scientia from AMDZone said...

Geneseo seems like a good foundation for CSI. I'm thinking that maybe the FSB licensing isn't really an initiative but is just something that would allow people to release products that would probably still be viable until 2011.

I'm realizing now that Intel is way, way behind with CSI, much further than I thought. So, yes, it would make sense for FSB products as a stopgap and this would make IBM happy since they have the only good chipset for 4-way and up that can use the Intel FSB, the XA-64e. I'm thinking that Intel won't be able to deliver a good server chipset for CSI until probably very late 2009 or 2010. IBM might be thinking of transitioning the XA-64e in the same time frame.

So, now I am thinking that Intel will move to CSI for Xeon in 2009.

Anonymous said...

"I'm realizing now that Intel is way, way behind with CSI, much further than I thought."

And you are basing this on knowledge of Intel's CSI development or some crazy logic on why Intel is proposing Geneseo?

Please provide some background on how you now know that CSI "is way, way behind". Do you know someone working on this design at Intel? (I ask this because I have not seen any info on the web or reports from Intel suggesting what you say)

Also why do you continue to think that CSI (or for that matter HT) is needed for mainstream & low end desktop and mobile applications? For single socket solution is it really necessary?

Scientia from AMDZone said...

CSI was orginally due out in 2007 on x86 as Tigerton. Now, it won't even be out in 2008. This puts CSI a minimum of 1 1/2 years behind.

Anonymous said...

"CSI was orginally due out in 2007 on x86 as Tigerton. Now, it won't even be out in 2008. This puts CSI a minimum of 1 1/2 years behind."

Is there something that you know (that others don't) that says it will not be out in 2008? The only explanation you seem to be giving is that licensing FSB technology now prevents CSI in 2008.

Behind/Ahead is a matter of perspective and reference point.

AMD's orginal roadmap for F36 was to startup on 65nm yet everyone keeps saying 65nm is ahead of schedule? Since they started up on 90nm for nearly 6-9 months does that mean F36 was ahead of schedule or 65nm was behind schedule?

Scientia from AMDZone said...

news.com

CSI won't arrive in high-end Xeons until 2009.

register

it's looking like CSI won't get to Xeon until 2009

endian

Delayed from 2007 until perhaps 2009?

FAB36 only contained 65nm tooling. It did produce some 90nm chips but mainly its volume was too low to have much effect. The process for 65nm involved extrapolating from IBM's 300 mm data plus data from FAB30. However, the ramp on FAB36 takes two years. The volume didn't increase to a serious level until mid 2006 which is when AMD became more serious about 65nm. There was no reason to rush with the new 65nm process and new 300mm tooling when the volume was so low. In contrast, the ramp for FAB38 should be quite a bit faster. This should be true as well of the NY FAB if AMD decides to build one.

Anonymous said...

Thanks for the links - they seem to prove my earlier point (which I think you disagreed with).

Intel will gradually phase in CSI over time starting on very high end server (itanium in 2008), mid range server Xeon in 2009 and probably high end desktop after that.

There obviously will be a need for FSB in mid/low range desktop and mobile for next 3-4 years even if CSI inmplementation goes perfectly. At the rate peripherals cards are brought to market I don't think this is a waste of time....

And by the way a 2 year ramp when you only have one factory to ramp is not exactly world class...especially when it was clear AMD was capacity constrained. It would seem there was a need to ramp 300mm and migrate to 65nm (assuming it was healthy at the time) more quickly - especially given your point they are using the same tooling as 90nm. AMD left a lot of chip sales on the table this year due to capacity constraints. This is also borne out by the fact that many of the early 65nm chips appear to be low end (2-2.6GhZ, 512 cache chips) while they continue higher end models on 90nm (either that or peformance/bin splits on 65nm is not that healthy yet for higher speed bins).

I appreciate your point of view and appreciate the back and forth without the need for the "you are an idiot I'm not going to provide any links, just google it" attitude found on some other blogs.

Darth Solarion said...

Looks like the K8L might have a different name. Not sure how correct is this news bit but digitimes is reputable.

http://www.digitimes.com/mobos/a20061002PR207.html

Wise Investor said...

Wise Investor:
Scientia you are trying too hard to explain so little.

Let me help you explain the much talked CSI and FSB with a simple story...

let say a farmer(intel) has a horse(FSB) to pull his wagon. Now the farmer is unsatisfy with the horse and wanted a truck(CSI). And the farmer gather all the relatives and announces he is going to get a truck.
But after the announcement, the farmer then went to a action house to look for a better horse( license the FSB).

The farmer isnt been very honest isnt it?

MMM, Scientia and Doc knows what Im talking about.

Scientia from AMDZone said...

Thanks for the links - they seem to prove my earlier point (which I think you disagreed with).

When I posted the article, I couldn't think of any reason for the FSB licensing because it was in opposition to CSI. Now, I've decided that this is because CSI is late and Intel really has no choice.

Intel will gradually phase in CSI over time starting on very high end server (itanium in 2008), mid range server Xeon in 2009 and probably high end desktop after that.

I agree. I think CSI is late but it will show up. Geneseo seems to follow this.

And by the way a 2 year ramp when you only have one factory to ramp is not exactly world class...

According to AMD, it is physically impossible to install the tooling any faster.

especially given your point they are using the same tooling as 90nm.

No. That isn't what I said. FAB 30 is 200mm and only capable of producing 90nm chips. AMD was delayed somewhat with FAB36 because it was both 300mm and 65nm so the data from FAB30 didn't apply and IBM's data only covers the basic process. This meant that AMD had to quickly learn about 300mm production plus 65nm production at the same time while ramping capacity. All of the 90nm chips produced in FAB36 were made with 65nm hardware.

AMD left a lot of chip sales on the table this year due to capacity constraints.

This is very true. However, the FAB36 hurdle was one that AMD will never have again. When FAB30 is upgraded to FAB38, it will be able to use the 300mm and process data from FAB36. The same thing applies if they build a FAB in NY. This is a much bigger gain for AMD than is apparent and a much bigger loss for Intel. It will pay off though in 2008 both for the FAB 30 transition to 300mm and the 45nm transition.

90nm production will ramp down starting mid 2007 and will end about mid 2008.

Scientia from AMDZone said...

But after the announcement, the farmer then went to a action house to look for a better horse( license the FSB).

I think in this case, Intel desperately wanted a truck (CSI) but realized that the truck wasn't reliable yet. So, Intel decided to get a better horse (FSB licensing) until the truck is ready in 2009.

Anonymous said...

"According to AMD, it is physically impossible to install the tooling any faster."

This actually is an area I'm familiar with and is not true. You can dock 2 tools a days and with install teams running 7x24, 20KWSPM would not take 2 years for full build out. For this capacity we are talking 5-7 tools max of any one given type, worst case qual is 6months green to green and tools can be staggered and typically in 2 months steps so trades work doesn;t overlap. The only real limiter is equipment supplier personnel and potentially trades (electrical, mechanical, etc) themselves. 18 months is achievable and with right amount of money 12-14 may be doable.

I forget F36 capacity off the top of my head but I seem to remember 20K WSPM

Scientia from AMDZone said...

Well, then your estimate is not far off what AMD says. They are saying 24 months to full capacity and you are saying 18 is possible. This sounds reasonable to me since they are also building a new bump and test facility at the same time. The extra time is probably also related to having to dismantle FAB 30 starting in Q2 07. FAB 36 will top out at 25K in mid 2008 but I imagine it will take to mid 2009 to get capacity up on FAB 39 to its maximum of 20K.