AMD Technology Analysts Day 2007 – quite a surprise.

Since Intel began talking about Penryn we've had a lot of rumors and speculation about K10. With live demonstrations from Intel and no information from AMD, I suppose it is only reasonable to expect rumors to pop up like so many mushrooms. Now that AMD has finally spoken though we can assign most of these to the trashcan. This Technology Analysts Day was different from the one last year. This one was less about initiatives like Torrenza, Trinity, and Raiden and more about actual hardware. It appears we finally have the answer to whether AMD is still going to be around in 2008 or 2009. The answer is clearly, yes.

There are a lot of rumors to take care of but I'll make a couple of points first. For example, lately I've seen people pushing the idea that AMD stuffed the channel in Q4 06 and this then led to the sharp drops in Q1 07. I can't say that I entirely blame these people for such speculation because I've been puzzled about this myself. Every time I tried to understand how AMD got from chip shortages in Q1 to full conversion of FAB 36 to 65nm before the end of Q2, it made no sense. The only explanation was that AMD had pulled off a near miracle and gotten 65nm ramped at FAB 36 in record time. Considering that this would have been faster than Intel converted to 65nm, it was a lot simpler to just assume that AMD was lying. I was a bit surprised therefore to have such speculation actually confirmed by AMD. They stated that they did indeed convert FAB 36 to 65nm in record time and they seemed to give plenty of credit for this to APM.

Another unexpected item was that AMD has pushed Direct Connect 2.0 and Fusion back to 2009. There won't be any processors in 2008 with four HT links or GPU's. And, with only three HT links AMD may still be limited to a best range of 4-way without using glue chips. On the other hand, I had only expected a minor core update in 2008 with DC 2.0. Instead, DC 2.0 will arrive on the brand new Bulldozer core. There isn't much known about it except it has longer pipelines and more powerful SSE performance with additional instructions and better IOMMU for virtualization. From this it appears that AMD is serious about holding onto the HPC top end. Now to the rumors:


Rumor: AMD is selling its FABs and outsourcing CPU production to TSMC.

This piece of FUD started with Covello's note with its wild speculation as a justification for buying more Intel stock. Yet, a number of people on the web have repeated and expanded on these rumors so much that AMD even felt compelled to address it directly:

AMD also explained exactly what "Asset Light" included:

I'm certain that these rumors will now try to morph into the argument that although AMD is not outsourcing CPU's today it probably will in the future. However, AMD was quite clear that FAB 30 would indeed be upgraded to FAB 38 and continue past 32nm:

They were also clear that the only CPU's that will be outsourced are embedded versions of Bobcat which can provide an x86 replacement for embedded MIPS in Xilleon and Imageon.


Rumor: Silverthorne is Intel's silver bullet.

Silverthorne is matched by AMD's Bobcat core in 2009 which draws as little as 1 watt. This now finally explains why AMD unloaded the Geode line so quickly.

Secondly, although Silverthorne should be a good competitor, AMD has twice the Intellectual Property plus relationships already in place with ATI customers for similar products. So Intel will have to work hard to catch up. Of course, Intel's existing relationship with Apple could give it the iPhone market. However iPhone is not likely to become a commodity item according to EETimes.


Rumor: The ATI merger has been a disaster with ATI employees leaving before they get laid off and ATI losing share since the merger.

This rumor was specifically addressed by AMD. It was stated that the attrition rate at ATI has always been low and that it has not increased since the merger. It was further stated that additional engineering staff had to be hired to handle AMD's new chipset and GPU related projects. Finally, the 790 55nm chipset has been pushed forward to Q4 so apparently things are on track.



Rumor: R600 proves that ATI is no longer competitive.

When R600 was reviewed it was on an 80nm process with leaky 80hs transistors. According to AMD, it is now being produced on a 65nm process and this version should be out in Q4. Secondly, few people seem to have noticed the success of the 690G chipset which is being used on 35 different motherboards.



Rumor: AMD's 65nm process is broken and that is why Barcelona can't clock.

At Technology Analysts Day 2007, AMD showed a 3.0Ghz quad core Phenom demo system. The door was open showing that the processor was running with stock air cooling.



Rumor: The SuperPi and Cinnebench tests proved that K10 is really no faster than K8.

In the VMware benchmark, after normalizing for twice as many cores and a slower clock, we see a 34% increase in IPC. This would seem a bit strange because if we combined this with AMD's 3.0Ghz demo we would end up with a system that is not only faster than anything Intel has today but is just as fast as a 3.33Ghz Penryn.

I had to remove the SPECfp graph because AMD has changed this in their official pdf. In the presentation it said that it was an actual test but in the pdf it now says that it is simulated. I had wondered about that when I saw it because it looked similar to the simulated benchmark. However, I just saw an actual comparison between a Barcelona 2.0Ghz system and a Xeon E5345 2.33Ghz system. Barcelona gets 78 on SPECfp while Xeon gets 60. This is 51% greater SSE IPC for K10 than Clovertown.


Rumor: Even if K10 is as fast as Penryn it won't matter because Nehalem's greater speed and massive connectivity will easily beat K10.

Maybe not. K10 works best with 4-way but Shanghai will have 8 cores making for a simple 4-way/32 core system. It also remains to be seen if HT 3.0's greater bandwidth allows reasonable 8-way systems. This would potentially be 64 cores on one system without using any glue chips. Intel loses its MCM advantage since Shanghai also uses MCM. Shanghai only needs half as much cache as Penryn so Intel gains no die size advantage (unless Nehalem has much less cache). Shanghai will also gain in IPC much as Penryn does. There is also some indication that Intel will cancel Tigerton and simply fill in with Tulsa until Nehalem is ready. This seems odd because Caneland will effectively be obsolete (along with all Woodcrest, Clovertown, and Penryn based systems) as soon as Nehalem is released. And, the later Nehalem appears in 2008 the closer it is to Bulldozer.


Rumor: Intel has two teams working on C2D. AMD, with fewer engineers will never be able to keep up with Intel's Tick Tock.

AMD has now announced Pipe which is an identical upgrade cycle to Intel's Tick Tock. It includes the same major core upgrade every two years with process upgrades in the alternating years.



Rumor: AMD doesn't even mention DTX anymore so it must be a failure.

AMD is already counting DTX as a success for 2007:

So, there must be considerable support for DTX. I have to wonder too if DTX (especially mini-DTX) is what AMD has in mind for Fusion. Fusion will allow OEM's to build systems without a northbridge and this which would seem to be a good match for a small form factor.


So, what does all this mean? Apparently AMD's success with the yields at 65nm has allowed them to push back the upgrade schedule for FAB 30. This certainly eases cost pressure on AMD while still allowing them to gain income from 200mm tooling sales. AMD's chipset and CPU lineups also seem competitive. Today is truly nothing like 2003 when AMD introduced Opteron with only its own supporting chipset. K10 is a drop-in replacement for K8 on socket AM2 or socket F and has nearly universal support among OEMs. This should allow K10 to gain traction far more rapidly than the slow pace of 2003 when it took months to even have one desktop chipset announced. It took a full year from its introduction for K8 to surpass K7 but today K10 should surpass K8 in about half that time.

AMD's financial problems are not over, of course, but it should be able to steadily improve its losses over the next three quarters. Although many assume that Intel's price cuts have made it impossible for AMD to make any profit with chip sales, this is not really the case. Intel's prices for C2D have remained relatively high so pricing pressure was more effective when AMD still had the bulk of its production on 90nm. For example, Intel has shown great reluctance to move Conroe prices down into the Celeron range. So, today, Intel is trying to cover the Celeron range with the single core Conroe L 420, 430, and 440 models which are not much of a bargain when matched up with AMD's similarly priced dual core X2 3600, 3800, and 4000 models.

The lowest priced real Conroe is the 1.6Ghz dual core Allendale E2140 for $81. This model is easily surpassed in everything except SSE performance by the 2.2Ghz X2 4200 at $80. Prices for AMD processors remain better than Conroe up to the 2.66Ghz E6700 where its higher speed surpasses AMD's fastest model. Essentially, AMD's X2's are all favorably priced up to and including the 3.0Ghz X2 6000 model at only $170. At current prices, the single Core Conroe L models are not competitive and the dual core models are not as favorably priced as AMD's X2's. Conroe's are a bargain though if your application needs the greater SSE performance of C2D. If you need greater speed then even the fastest 3.0Ghz dual core E6850 at $330 and the lowest priced quad core 2.4Ghz Q6600 at $320 are reasonably priced. Obviously, the prices of the faster quad cores will drop when they face quad core competition from AMD.

I'm certain the 3.0Ghz quad demo left many people wondering when such chips would actually be available. Anandtech's take seems particularly negative suggesting as late as Q2 08. But then Anand hasn't exactly been objective about AMD in the past five years so perhaps we should consider that the upper bound. Realistically, the 3.0Ghz chip could have been cherry picked. And, it generally takes about six months for production to catch up to a cherry picked chip. So, I can't imagine that 3.0Ghz would arrive later than Q1 08. Before that happens though we'll have to find out just how well Barcelona really stacks up to C2D. If the VMWare ratio is genuine then Barcelona would launch with a 2.0Ghz speed equal to a 2.4Ghz Clovertown or a 2.8Ghz Opteron. This would mean a 2.0Ghz dual core Phenom would probably match a slower 2.3Ghz Conroe. These IPC ratios are very important because it will be easier for AMD to produce lower clocked K10's, and if AMD can match C2D at a lower clock then this is good for both AMD's volume and pricing. This will be the central factor in AMD's financial recovery. If K10 needs to match C2D 1:1 in clock to be competitve then AMD will have a very tough time over the next 3 quarters. However, the higher K10's IPC and therefore the less clock speed that K10 needs to match C2D the faster AMD will recover. And, this ratio should be known for certain perhaps in less than one month.